ADVISORY/IDT, Xilinx and P-Cube to Present NetSeminar on Data-Flow Management Solutions.Business Editors/High-Tech Writers ADVISORY...for Tuesday (Dec. 9) SANTA CLARA Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , Calif.--(BUSINESS WIRE)--Dec. 8, 2003 Free Discussion Co-Sponsored by IDT IDT Integrated Device Technology, Inc. (Santa Clara, CA, USA) IDT I Don't Think IDT Identity Theft IDT Interrupt Descriptor Table IDT Integrated DNA Technologies IDT Inactive Duty Training IDT Instructional Design & Technology and Avnet Cilicon Focusing on Eliminating High-Speed Networking Bottlenecks IDT(TM) (Integrated Device Technology IDT (NASDAQ: IDTI) was founded in 1980 as a semiconductor vendor. Employing approximately 2500 people worldwide, headquartered in San Jose, California and operating a fab in Hillsboro, Oregon, the company both designs and fabricates semiconductor components. , Inc.)(Nasdaq:IDTI IDTI Integrated Device Technology Inc ), a leading communications IC company, announced that on December 9, 2003 it will join Xilinx, Inc., the world's leading programmable logic See PLD. supplier, and P-Cube, the originator Originator A bank, savings and loan, or mortgage banker that initially made a mortgage loan that is part of a pool. Also, an investment bank that has worked with the issuer of a new securities offering from the beginning and is usually appointed manager of the underwriting of programmable IP service control platforms, in an EE Times Network NetSeminar to address some of the factors impeding im·pede tr.v. im·ped·ed, im·ped·ing, im·pedes To retard or obstruct the progress of. See Synonyms at hinder1. [Latin imped data flow in high-speed networks. The growing demand for data transmission at higher speeds using multiple data paths has resulted in increased data-flow "bottlenecks" for high-speed networking systems. These systems require a large amount of data to be prioritized at high speeds, thus requiring more efficient data-flow control methodologies. To address these challenges, senior engineers and design managers from IDT, Xilinx and P-Cube, all with extensive experience in network product design and development, will present solutions to eliminate data-flow bottlenecks using a joint solution combining IDT flow-control management devices and Xilinx Virtex-II Pro FPGAs. They will discuss different methods of addressing these data-flow issues in an effort to help system designers choose their next silicon solution. This NetSeminar is co-sponsored by IDT and Avnet Cilicon. Registration is free, and the NetSeminar will be archived for six months.
WHAT: EE Times Network NetSeminar -- Eliminate Data-Flow
Bottlenecks in Your High-Speed Networks
WHO: Mark Hoke, senior member of the FCM technical staff, IDT;
Sam Sanyal, solutions engineer, Xilinx; Meir Ohana,
hardware system design manager, P-Cube
WHEN: December 9, 2003 at 9 a.m. PST
LOCATION: Registration URL
http://webevents.broadcast.com/cmp/wcs/detail.asp?event_id=10943
About IDT www.idt.com IDT and Interprise are trademarks and the IDT logo is a registered trademark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. |
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