ADVISORY/C Level Design to Sponsor Hands-On Tutorial for Hardware Design Using C/C++ At IP/SOC 2001.Business Editors/High-Tech Writers ADVISORY...for Monday (March 19) --(BUSINESS WIRE) C Level Design, Inc. the sales and technology leader for C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ design and verification solutions, today announced it will sponsor a full day, hands-on tutorial titled "Hardware Design, Verification and Synthesis using C/C++" at the IP/SOC IP/SOC Intellectual Property/System-on-Chip 2001 Conference. This practical, hands-on tutorial will cover all key aspects of hardware design using ANSI (American National Standards Institute, New York, www.ansi.org) A membership organization founded in 1918 that coordinates the development of U.S. voluntary national standards in both the private and public sectors. It is the U.S. member body to ISO and IEC. C/C++.
WHAT: IP/SOC 2001 Tutorial No. 1T2
"Hardware Design, Verification and Synthesis using C/C++"
WHEN: March 19 from 9:00 a.m. to 5:00 p.m.
WHERE: IP/SOC Conference at the Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA 95054
REGISTRATION: To participate in the tutorial, please register at
http://www.ipshows.com/register.html.
For more information regarding the tutorial (1T2), please go to http://www.ipshows.com/program/success.html About C Level Design C Level Design, Inc., the sales and technology leader for C/C++ design tools was founded in 1997 to develop and market system-level design products for system and hardware designers. The company's products and consulting expertise in C/C++ enable global electronics companies in the telecommunications, networking and processor market segments to create and verify their designs using ANSI C/C++ for higher simulation performance and designer productivity, and synthesize To create a whole or complete unit from parts or components. See synthesis. those designs for use in existing RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. design flows. For more information, visit: http://www.cleveldesign.com Note to Editors: C Level is a trademark of C Level Design, Inc. All other brands or product names may be trademarks or registered trademarks of their respective companies and should be treated as such. |
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