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ADVISORY/Accellera Offers Free SystemVerilog Seminar in Munich, Germany; Accellera's Language Evolution: An Introduction to SystemVerilog, Thursday, 6 March 2003, Munich, Germany.


News Editors/High-Tech Writers

ADVISORY...for Thursday Thursday: see week.  (March 6)

--(BUSINESS WIRE)

Who

Accellera Accellera was founded in 2000 from the merger of Open Verilog International and VHDL International. Accellera is a standards organization devoted to the development of standards and open interfaces in the electronic design automation space. , the EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  organization focused on language-based design standards Design standards

Specifications of materials, physical measurements, processes, performance of products, and characteristics of services rendered. Design standards may be established by individual manufacturers, trade associations, and national or
 invites the electronic design community to attend a SystemVerilog seminar in Munich, Germany.

What

Accellera's Language Evolution: An Introduction to SystemVerilog

This seminar covers technical details about SystemVerilog, the first Hardware Design and Verification Language (HDVL HDVL Hab Dich Voll Lieb (German) ), and the progress being made on standardization standardization

In industry, the development and application of standards that make it possible to manufacture a large volume of interchangeable parts. Standardization may focus on engineering standards, such as properties of materials, fits and tolerances, and drafting
. The tutorials cover using SystemVerilog for design and updates about the SystemVerilog committees' work and progress on assertions, testbench modeling, and C Application Programming Interfaces (APIs). The seminar also includes discussions of practical applications of these mechanisms for concise hardware design, integrated verification and assertion methodology and system interconnect (1) To attach one device to another.

(2) A physical port (plug, socket) or wireless port (transmitter, receiver) used to attach one device to another.
.

When

9:00-13:00

Thursday, 6 March 2003


Agenda
        9:00 - 9:15     Welcome
                        Dennis Brophy Accellera Chairman
                        Introduction to SystemVerilog
                        Vassillios Gerousis, Accellera Technical
                        Committee Chair
        9:15 - 10:15    SystemVerilog Design Tutorial
                        Stu Sutherland, Sutherland HDL
        10:15 - 11:15   SystemVerilog Testbench Tutorial
                        David Smith, Chair Accellera SystemVerilog
                        (SV) Enhancement Committee
        11:15 - 11:30   Break
        11:30 - 12:30   SystemVerilog Assertions Tutorial
                        Steve Meier, Co-Chair SV Assertions Committee
                        SystemVerilog C/C++ Application Programming
        12:30 - 13:00   Interface (API) Tutorial
                        Michael Rohleder, Motorola



Where

Room 21B, International Congress Center Munich (ICM ICM Intercom
ICM Integrated Crop Management
ICM International Congress of Mathematicians
ICM Information Classification and Management
ICM Intelligent Contact Management (Cisco)
ICM International Creative Management
)

Messe Munich, Germany

Registration

The seminar is free and no advance registration is required.

About Accellera

Accellera is an electronics industry organization driving the worldwide development and use of standards required by systems, semiconductor, and design tools companies that enhance a language-based design automation process. For more information, please visit www.accellera.org.

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Publication:Business Wire
Geographic Code:4EUGE
Date:Feb 28, 2003
Words:274
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