ADVISORY/Accellera's European Meeting Features HDL Debate and Technical Updates.Business Editors/High-Tech Writers ADVISORY...for Monday (Mar. 3) Design Automation and Test in Europe Design Automation and Test in Europe, or DATE is a yearly conference on the topic of electronic design automation. It is typically held in March or April of each year, alternating between France and Germany. Conference --(BUSINESS WIRE) Monday, 3 March 2003, 1400-1700, Munich, Germany Who Accellera (www.accellera.org), the EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. organization focused on language-based design standards invites the electronic design community to attend its open member meeting in Munich, Germany. What Accellera's open member meetings at the Design Automation and Test in Europe (DATE) conference features Accellera members and members of the Hardware Description Language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog. (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. ) Community giving updates about Accellera's standards efforts and sharing their viewpoints about HDL-based design in Europe. Agenda Accellera Introduction: Ian Benson, TransEDA, Accellera Board Member Technical Presentations: Property Specification Language (PSL 1. PSL - Portable Standard Lisp. 2. PSL - Problem Statement Language. See PSL/PSA. ), Erich Marschner, Accellera's Formal Verification Committee Chair SystemVerilog, Vassilios Gerousis, Accellera's Technical Committee Chairman Programming Language Interface (PLI PLI Practising Law Institute PLI Professional Liability Insurance PLI Programming Language Interface (Verilog programming language) PLI Partido Liberal Independiente (Independent Liberal Party, Nicaragua) ) for VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , John Shields, VHDL Committee Debate: Europe's role in the HDL market Ian Phillips, ARM Erich Marschner, Cadence Yaron Wolfsthal, IBM Haifa Vassilios Gerousis, Infineon When Monday, 3 March 2002 1400-1700 Where Room 5 International Congress Center Munich (ICM) Messe Munich, Germany Registration The meeting is open to all. To reserve a place, please visit www.accellera.org/calendar.html. For information about DATE, please visit www.date-conference.com. About Accellera Accellera is an electronics industry organization driving the worldwide development and use of standards required by systems, semiconductor, and design tools companies that enhance a language-based design automation process. For more information, please visit www.accellera.org. Note to Editors: All trademarks and tradenames are the property of their respective holders. |
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