Printer Friendly
The Free Library
4,489,051 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

ADVISORY/ Future Design Automation Demonstrates C to RTL Flow at EDS Fair; January 30 and January 31, 2003, Pacifico, Yokohama, Japan.


Business Editors/High-Tech Writers

ADVISORY...for Thursday & Friday (Jan. 30 & 31)

--(BUSINESS WIRE)

Who

Future Design Automation, a developer of Electronic Design Automation
(EDA) behavioral synthesis software

What

At EDS Fair, Future Design Automation is demonstrating how its
Electronic System-level (ES-level) suite of tools and C to RTL flow
increases the productivity of DSP designers, algorithm developers,
system architects, hardware designers and verification engineers
developing systems on chip (SoC) that include complex algorithms.

Future Design Automation's users have reported a 2x improvement in
design productivity and a 10x increase in performance.

When

10am to 6pm
Thursday, January 30, 2003
Friday, January 31, 2003

Where

Electronic Design and Solution Fair (EDS Fair)
Booth Number 601
Pacifico Yokohama Exhibition Hall
Yokohama, Japan

Contact:

To make an appointment with Future Design Automation in Japan, please
email info@future-da.co.jp or call +81-3-5774-5840 In the USA, call
Bob Barker at +1 408 279-3135 or email barker@future-da.com For
information about EDS Fair, please visit http://www.edsfair.com


About Future Design Automation

Future Design Automation is a system-level EDA tool supplier, headquartered in Tokyo, Japan. The Company's high-level design tools support C and C++. For more information please visit www.future-da.com.

In the USA, Future Design Automation is located at 675 N. First Street, Suite PH3 PH3 - Phosphine
PH3 - Photographer's Mate Third Class (Naval Rating)
, San Jose, CA 95112, 408 279-3135

All trademarks and tradenames are the property of their respective holders.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jan 27, 2003
Words:232
Previous Article:CNF Inc. Declares Quarterly Dividend On Common Stock.
Next Article:Callaway Golf Announces Awards for Top Clubfitters Using the Callaway Golf Custom Fitting Solution.



Related Articles
ADVISORY/George Janac of InTime to Speak About SoC Design Challenges at the EDS Fair in Yokohama, Japan, January 24 and January, 25, 2002.
ADVISORY/Aptix Invites Japanese Electronic System Design Community to Meet at EDS Fair and Learn More About Pre-Silicon Prototyping of SoC and...
ADVISORY/Monterey Design Systems at the Electronic Design and Solutions Fair 2003.
REMINDER/Aptix Invites Japanese Electronic System Design Community to Meet at EDS Fair and Learn More About Pre-Silicon Prototyping of SoC and...
REMINDER/ Future Design Automation Demonstrates C to RTL Flow at EDS Fair; January 30 and January 31, 2003, Pacifico, Yokohama, Japan.
Carbon Announces Participation in Japan's EDS Fair, Exhibit Showcases Accurate Pre-Silicon Electronic Design Validation.
Shimadzu Introduces Two New Models of Cardiovascular Imaging System.
Events.(HAPPENINGS)(Calendar)
JVC to Hold 29th Tokyo Video Festival 'TVF 2007'; 31 Works Chosen for 'Excellence Award', 69 as 'Selected Work'.
Event.(HAPPENINGS)(Calendar)

Terms of use | Copyright © 2008 Farlex, Inc. | Feedback | For webmasters | Submit articles