ACM Announces Breakthrough in Copper Integrated With Pure Ultra-Low-K Dielectrics; Stress Free Copper Polishing -- SFP -- Process: A New Era In Copper Polishing.

Business Editors/High-Tech Writers

FREMONT, Calif.--(BUSINESS WIRE)--July 26, 2001

Following the launch of two prototype production tools last October aimed at addressing the limitations of processes for depositing and polishing copper on device wafers with 0.13 micron features and below, start-up ACM today announced breakthrough results that demonstrate the advantages of the stress free copper polishing (SFP) process over the traditional CMP methods without compromising yield. The company successfully polished device wafers with copper integrated with pure ultra-low-k dielectrics under k=2.2.

The physical limitations of CMP beyond 0.13-micron manufacturing have created a challenge for the IC industry, especially for technologies adopting low-k material and aggressive design rules. Developing a viable solution for these processes integrated with ultra-low-k dielectrics without compromising device performance, reliability, yield and overall cost of ownership, became most challenging. Due to the mechanical force applied in conventional CMP, copper lines are moved back and forth during the polishing process. This results in critical damage (Fig. 1)(a) to the interconnect structures, delamination of the ultra-low-k dielectric (Fig. 2)(a) and eventual yields loss in the current 0.13 micron process technologies, making it highly un-extendable for future technology nodes.

"The latest results demonstrated by using ACM's Ultra SFP(TM) confirm what we expected," said Michel Rehayem, director of sales at ACM. "No mechanical damage to copper interconnect lines or to the ultra-low-k dielectrics (Fig. 3)(a). The material between the copper lines could be micro bubbles of air, without the concerns of stress or delamination."

These results clearly indicate that ACM's Ultra SFP(TM) technology allows for an earlier implementation of ultra-low-k dielectrics into copper interconnects structures and keeps Moore's law in curve. Since the mechanical strength is no longer an issue for the low-k dielectric process integration, now, IC manufacturers have more low-k dielectric selections based on overall performance rather than concerns with their mechanical strength.

ACM's Ultra SFP(TM) technology is the first to provide the industry with copper/low-k integration capability by eliminating a multi-step low-k implementation strategy (k=3.5, 3.0, 2.5, 2.2, 2.0 and below) a one leap from conventional oxide to ultra-low-k below 2.2. Migration to smaller design rules are made easier, without the impact of the costly development of each generation of low-k dielectric, slurries, pads, qualifications, characterizations of the process and related integration issues.

"There are several competing prototype technologies vying to replace CMP at the sub 0.13 technology node," stated David Wang, founder and CEO of ACM. "The results demonstrated with our key customers reinforce the direction of our roadmap and clearly position our new copper polishing process as a viable, stress-free solution to the industry's challenges for the post CMP era."

The Process

ACM Research developed a new technology to remove copper by using a stress-free process based on electro-polishing as in reverse electro-plating. In the past, experiments with electro-polishing were abandoned because of unsuccessful results on the wafer. However, Dr. David Wang, founder and CEO of ACM, solved these issues by applying a novel patented technique employing a localized control, ensuring a highly uniform removal rate from the center to the edge of the wafer, independent of wafer size.

Cost of Ownership Improves with New Process

Using the new systems ACM boasts a high removal rate with excellent uniformity and substantial lower defects. In addition, rather than compromising the cost of ownership (CoO), the new results show significant increase in return on investment and higher manufacturing revenues. Unlike CMP, no consumable costs are incurred with the Ultra SFP(TM) process and re-qualifications and downtime are greatly reduced. In addition, the system is capable of processing 200 and 300 mm wafers and is compatible with Fab automation and compliant with all safety and performance standards.

About ACM Research

ACM Research Inc. was formed in January 1998 by a team of industry veterans specifically to focus on advanced copper metallization process technology, from which the company name is derived. ACM's Ultra ECP(TM) process technology provides the semiconductor industry with the ability to electroplate copper on thin (less than 50 Angstroms) seed layers with excellent uniformity. In addition to copper metallization, ACM introduced the semiconductor industry to its first stress-free polishing system, the Ultra SFP(TM) with atomic layer level control.

CEO Dr. David Wang has a BS degree from Tsinhua University in China and an MS and Ph.D. in semiconductor process and equipment from Osaka University in Japan. In the U.S. Dr. Wang became a research fellow in electrical and computer engineering at the University of Cincinnati and was principal investigator in SBIR programs founded by NASA and the Department of Defense. Prior to the formation of ACM Research, Dr. David Wang had been manager of the R&D program at Quester Technology, Inc.

Other key members of the ACM team include Herb Henderson, former vice president of operations at Applied Materials, Inc. and founder of Tetron Inc., Dr. Stephen Sun Chiao, professor of electrical engineering at San Jose State University and director of its High Frequency Electronics Laboratory, and Mohammed Afnan, former architect for CVD systems at Quester Technology where he also managed the 300 mm product software development.

ACM Research, Inc. is located at 46520 Fremont Blvd., Suite 610, Fremont, CA 94538; telephone [phone]; fax [phone].

Note to Editors: Trade Marks Pending

(a) SEM photographs available at www.acmrc.com.