64Mbit Low-Voltage Flash Chip from STMicroelectronics Stores Code and Data.Business & Technology Editors GENEVA--(BUSINESS WIRE)--Sept. 6, 2000 Multibit cell technology means high density storage, low cost, and small size; synchronous burst and page read modes means high system performance STMicroelectronics (NYSE NYSE See: New York Stock Exchange : STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ) has introduced a 64Mbit flash memory chip, the M58LW064, that operates from a single 2.7V to 3.6V supply voltage, enabling storage of both data and program code in the same device, and harnessing multibit cell technology to achieve high density and low cost storage. By storing two data bits in each memory cell, the M58LW064 has a 50% higher array efficiency compared to chips that store one bit per cell. The M58LW064 accepts a separate supply from 2.5V to 1.8V to power its I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output buffers. The Flash chip is available in two versions: the M58LW064A, organized as a x16 device; and the M58LW064B, whose organization is selectable as either x16 or x32. Both chips are built from NOR-type flash using a 0.18um CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. process. The M58LW064 can combine data and code in the same non-volatile memory array, achieved through a software read-while-write capability. The operating current consumption is 30mA. In standby, it is 50uA and in the automatic deep power down mode, it is as low as 1uA. As a result, the M58LW064 is especially suitable for not only a wide variety of handheld applications, such as interactive PDAs, but also digital set-top boxes, Internet appliances, digital still cameras and other consumer devices, as well as networking equipment and solid-state Flash disks. For high performance, the M58LW064 has several different read modes including a pipelined burst synchronous configurable (type, length and latency) interface that reads data at a clock rate up to 66MHz. Data is read in fixed or unlimited (continuous) length bursts. As an alternative, the M58LW064 can also perform either random or latch-controlled page-mode asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end. read operations. The random asynchronous read operation has a 150ns access time and the four words page-mode can be accessed in 25ns after the first 150ns read phase. For improved programming time, the M58LW064 can be in-system programmed in groups of 16 words or eight double words at a time. Programming time is 12us per word. Data is erased at the block level, with each block comprising 1Mbit. Each of the 64 blocks in a chip can be erased and reprogrammed independently of the others. Erasing a block typically takes about 1 second, and all blocks are protected against spurious programming and erasure during power up. Also, any block can be protected from erasure and reprogramming at any time. Blocks can be programmed and erased over 100,000 times and data is retained for 10 years. The M58LW064 accepts commands through a command interface that uses standard microprocessor write command timings and executes the Common Flash Interface (CFI CFI abbr. cost, freight, and insurance ) command set. In addition, a program/erase controller automatically handles all the internal timing needed for programming and erasing the chip. A status register monitors operations and a ready/busy output indicates when an operation is complete. To reduce power consumption below that of the normal standby mode, the M58LW064 includes a reset/power down mode. When the chip is in the power down mode, the device is write-protected and its status and burst configuration are cleared. Recovery time from this mode is only 10us. This device is the first of an upward density compatible family for 64, 128 and 256Mbit products. The M58LW064A is available in a TSOP (Thin Small Outline Package) A very thin, plastic, rectangular surface mount chip package with gull-wing pins on its two short sides. TSOPs are about a third as thick as SOJ chips. See gull-wing lead, SOP, SOJ and chip package. 56, uBGA56, and FBGA FBGA Fine-Pitch Ball Grid Array FBGA Fine Pitch Bga FBGA Fine Line Bga 54 package. The M58LW064B is available in a PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. 80 and TSOP(II)86. About STMicroelectronics STMicroelectronics (formerly SGS-THOMSON Microelectronics) is a global independent semiconductor company, whose shares are traded on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. , on the ParisBourse and on the Milan Stock Exchange Milan Stock Exchange The largest regional stock exchange in Italy, facilitating more than 90% of the country's trading volume. . The Company designs, develops, manufactures and markets a broad range of semiconductor integrated circuits (ICs) and discrete devices used in a wide variety of microelectronic applications, including telecommunications systems, computer systems, consumer products, automotive products and industrial automation and control systems. In 1999, the Company's net revenues were $5.056 billion and net earnings were $547 million. Further information on ST can be found at www.st.com. |
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