3DSP Unveils the Industry's First Universal PHY Processor -- UniPHY.Business Editors & High-Tech Writers IRVINE, Calif.--(BUSINESS WIRE)--Oct. 18, 2001 3DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive Corporation(TM), the leader in configurable digital signal processor A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time computing. Characteristics of typical Digital Signal Processors
The UniPHY core's custom instructions and architectural features are specifically tuned towards PLSP applications -- including Wireless LAN A local area network that transmits over the air typically in the 2.4 GHz or 5 GHz unlicensed frequency band. It does not require line of sight between sender and receiver. Wireless base stations (access points) are wired to an Ethernet network and transmit a radio frequency over an area (802.11a, 802.11b, HiLAN2), and xDSL. With the flexibility to program a multiple-standard PHY See physical layer and physical. solution on the same processor, UniPHY's low power design and application specific optimizations ensure efficient power consumption. Capable of execution speeds between 400 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. and 1 GHz, the UniPHY processor combines an accelerated version of 3DSP's super-scalar SIMD (Single Instruction stream Multiple Data stream) A computer that performs one operation on multiple sets of data. It is typically used to add or multiply eight or more sets of numbers at the same time for multimedia encoding and rendering as well as scientific (SuperSIMD(R)) architecture and SP-X(TM) instruction set with a new expansion instruction mode. Expansion instructions unleash the processor's full computational power by allowing simultaneous use of all 12 of its functional units. This combination allows UniPHY to provide efficient code size along with the raw processing power required to perform critical broadband communications algorithms. "We developed UniPHY specifically to meet the ever-evolving PHY layer standards for multiple broadband communication protocols," said HD Boesch, vice president of marketing at 3DSP. "In essence, UniPHY resolves the challenge of interoperability and multiple standards that system integrators constantly face." UniPHY's 64-bit wide expansion instructions execute up to 12 parallel arithmetic operations per cycle with additional built-in load and store capabilities. SoftDatapath(TM) technology combines the data throughput performance of application specific datapaths with programmability. Additionally, datapath registers eliminate register file and memory access bottlenecks by feeding intermediate results of calculations directly to another functional unit. "The UniPHY concept is a compelling DSP solution for a variety of products in the growing broadband communication market," said Will Strauss, president of market research firm Forward Concepts. "It's the first core I've seen that can provide performance levels that approach ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. solutions, while retaining the flexibility for implementing multi-standard solutions that allow licensees to significantly differentiate their products." 3DSP's UniPHY IP core is available for licensing fourth quarter, 2001 along with compiler, assembler, debugger and simulator tools. To accompany the UniPHY core, 3DSP is developing a reference chip and application software that initially includes 802.11a, 802.11b, HiLAN2 and SPEEDi(TM).
UniPHY(TM) Performance Benchmarks
Benchmark Number of Cycles
FIR (T=32, N=100) 442
256-pt Complex FFT 659
Viterbi GSM 608
802.11a Baseband RX
with Viterbi 492 MCPS
802.11a Baseband RX
without Viterbi 114 MCPS
About 3DSP Corporation 3DSP offers the industry's only fully configurable digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). architecture with a comprehensive object-oriented design Transforming an object-oriented model into the specifications required to create the system. Moving from object-oriented analysis to object-oriented design is accomplished by expanding the model into more and more detail. environment and application-based intellectual property. 3DSP's technology empowers system designers to create custom SoC solutions in silicon that achieve significant competitive advantages in terms of performance, integration, power consumption, cost and time-to-market for tomorrow's multimedia, wireless and Voice over Packet applications. Industry leaders including Agilent, ATI (ATI Technologies Inc., Markham Ontario, http://ati.amd.com) A leading manufacturer of graphics chips and display adapters. Founded in 1985 by K. Y. Ho, Benny Lau and Lee Lau, ATI chips and boards are widely used by OEMs. , National Semiconductor and Syntek license 3DSP technology. 3DSP's principle investors include Alcatel Ventures, Intel Capital and FVIC. For more information on the company and its products, visit www.3dsp.com or contact 3DSP headquarters at 16271 Laguna Canyon Rd., Irvine, Calif. 92618, phone: 949/435-0600, fax: 949/435-0700. Note to Editors: 3DSP Corporation, 3DSP, SoftDatapath, SuperSIMD, UniPHY, SPEEDi, SP-X, SP-3, and SP-5 are trademarks of 3DSP Corporation. |
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