10th anniversary PCB Design Conference East: the premier conference and exhibition for PCB engineering, design and manufacture professionals.

Conference: October 10-14, 2005

Exhibition: October 12-13, 2005

Expo Center of New Hampshire in Manchester, NH

www.pcbeast.com

CONFERENCE October 10-14, 2005

EXHIBITION October 12-13, 2005

Expo Center of New Hampshire in Manchester, NH

EXHIBITION HOURS October 12 10 am-6:30 pm

October 13 10 am-4 pm

INTRODUCTION

Brought to you by the people who publish Printed Circuit Design & Manufacture and Circuits Assembly magazines ...

Join us in Manchester, NH, on October 10-14 for the 10th anniversary PCB Design Conference East. The premier conference and exhibition for PCB engineering, design and manufacture professionals, PCB East 2005 is produced by UP Media Group--the publisher of trusted industry magazines Printed Circuit Design & Manufacture and Circuits Assembly.

To celebrate PCB East's 10th anniversary, we've put together a PCB design training and networking experience that's superior to any other in the PCB industry. PCB East 2005 will be our most exciting East Coast show ever, so make plans now to attend. You won't want to miss our 10th anniversary celebration during the Opening Night Reception and the other new events that we've planned.

At PCB East 2005, you'll create your own personalized training program by choosing from over 40 technical courses taught by renowned industry experts (see page 12). You'll have an opportunity to network with your peers at a variety of new events (see page 3). Plus, we've rearranged the conference schedule to give you even more time on the show floor, where you'll learn about important new products and services that could help your company save money, get to market faster and be more competitive. Consider these conference benefits:

Don't miss this amazing opportunity to invest in your career as you enjoy open access to some of the brightest and most knowledgeable minds in the industry. Register by September 9, 2005, and you'll also save $100 on most registration packages. See page 14 for details.

I look forward to meeting you in Manchester as you embark on five great days of education, exploration and inspiration!

Andy Shaughnessy Conference Chair, PCB Design Conferences Editor, Printed Circuit Design & Manufacture

SPECIAL EVENTS

Monday, October 10

Welcome Luncheon and Industry Icon Roast

12-1:30 pm in the Curriers Dining Room Sponsored by Printed Circuit Design & Manufacture

The Welcome Luncheon and Industry Icon Roast will provide Monday conference attendees with a good time and a lot of laughs during mouth-watering plated luncheon--complete with dessert and coffee. For now, we're keeping the roaster's name under wraps, but clues will be "leaked" between now and the show on the PCB East Web site. Exhibits-only attendees, exhibitors and others who wish to attend the Welcome Luncheon and Industry Icon Roast may preregister to attend for a fee of only $25.

Dinner With Strangers

6:30 pm in the Lobby Lounge

Whether you're attending the show on your own--or you just don't want to eat dinner alone--be sure sign up at the Registration Desk on-site to have "dinner with strangers." This is a great way to get to know your peers at the show and enjoy a great meal at the same time! How does it work? You'll meet in the Lobby Lounge at 6:30 pm, pair up or form groups, then decide where to go for dinner based on our recommendations.

Tuesday, October 11

Trivia Night

7-9 pm in the Lobby Lounge

Sponsored by Printed Circuit Design & Manufacture

Power down your laptop, turn off the TV and come down to the Lobby Lounge for Trivia Night! Whether you're a nut about trivia or you just enjoy the thrill of competition, join your fellow PCB East attendees in the Radisson Lobby Lounge and put your knowledge of esoterica to the test. Fun and whacky prizes will be awarded. The event will be hosted by PCD&M Editor Andy Shaughnessy.

Wednesday, October 12

Cyber Care and Lounge

Wednesday and Thursday during the exhibition in the Expo Center

Maximize the time you have to visit the show floor and meet with exhibitors by checking your e-mail or taking a quick break in our conveniently located Cyber Cafe and Lounge.

PCB Book Store and Book Signings

Wednesday and Thursday during the exhibition in the Expo Center

Come prepared to purchase your new reference materials from the PCB Book Store during the two-day exhibition. Author signings will be held during the Opening Night Reception. Check the show Web site for updates on participating publishers and book signings.

Keynote Address 

12:30-1:30 pm in the Expo Center

This year's Keynote Address speaker and topic will be announced at a later date on the PCB East 2005 Web site. Visit www.pcbeast.com regularly for the latest show information.

10th Anniversary Opening Night Reception

5-6:30 pm in the Expo Center

You're invited to celebrate the 10th anniversary of PCB East and help us honor our 10-year exhibitors at the special 10th Anniversary Opening Night Reception. You'll be able to check out the exhibits and network with your peers in a relaxed reception atmosphere--complete with complimentary hors d'oeuvres, beverages served in collectible glasses and much more. Mark your calendar today!

Pub Night at Jillian's

7-11 pm at Jillian's (located just two blocks from the Expo Center at 50 Phillipe Cote Street)

Following the Opening Night Reception, you're invited to head over Jillian's for a pub-style evening of FREE pool, darts and shuffleboard--plus food, drinks, and live music supplied by the Porch Dawgs. Get your groove on to rock and blues standards kicked up by this infamous band of PCB industry professionals. Or show off your nine-ball or cricket skills by handily defeating an unsuspecting colleague or coworker. A great time will be had by all, and you just might win a fun door prize that will be awarded during the evening!

Thursday, October 13

Ice Cream Social

2-4 pm in the Expo Center

There's nothing like an ice cream social to satisfy a sweet tooth and bring folks together on the show floor during the final two hours of the two-day exhibition. Don't miss your last chance to visit with exhibitors and your fellow attendees in a relaxed atmosphere while enjoying a dish of delicious, cold ice cream.

Dinner With Strangers

6:30 pm in the Lobby Lounge

Whether you're attending the show on your own--or you just don't want to eat dinner alone--be sure sign up at the Registration Desk on-site to have "dinner with strangers." This is a great way to get to know your peers at the show and enjoy a great meal at the same time! How does it work? You'll meet in the Lobby Lounge at 6:30 pm, pair up or form groups, then decide where to go for dinner based on our recommendations.

CONFERENCE AGENDA

MONDAY, OCTOBER 10

8 am-5 pm

On-Site Registration

Registration Desk

9 am-5:30 pm

Professional Development Certificate Courses

Expo Center or Radisson Classrooms

12-1:30 pm

Welcome Luncheon and Industry Icon Roast

Curriers Dining Room

6:30 pm

Dinner With Strangers

Lobby Lounge

TUESDAY, OCTOBER 11

8 am-5 pm

On-Site Registration

Registration Desk

8:30 am-12 pm

Technical Conference Courses

Expo Center or Radisson Classrooms

9 am-5 pm

Professional Development Certificate Courses

Expo Center or Radisson Classrooms

12-1 pm

Professional Development Attendee Lunch

Curriers Dining Room

12-1:30 pm

Technical Conference Attendee Lunch Break

(lunch on your own)

1:30-5 pm

Technical Conference Courses

Expo Center or Radisson Classrooms

7-9 pm

Trivia Night

Lobby Lounge

WEDNESDAY, OCTOBER 12

7:30 am-6 pm

On-Site Registration

Registration Desk

8 am-11 am

Technical Conference Courses

Expo Center or Radisson Classrooms

10 am-6:30 pm

Exhibition

Expo Center of NH

12-2 pm

FREE Lunch for All Attendees and Exhibitors

Expo Center of NH

12:30-1:30 pm

Keynote Address

Expo Center of NH

2-3 pm

Technical Conference Courses

Expo Center or Radisson Classrooms

4-5 pm

Technical Conference Courses

Expo Center or Radisson Classrooms

5-6:30 pm

10th Anniversary Opening Night Reception

Expo Center of NH

7-9 pm

Pub Night at Jillian's

Jillian's (50 Phillipe Cote Street)

THURSDAY, OCTOBER 13

7:30 am-4 pm

On-Site Registration

Registration Desk

8-11 am Technical Conference Courses Expo Center or Radisson Classrooms

10 am-4 pm

Exhibition

Expo Center of NH

12-2 pm

FREE Lunch for All Attendees and Exhibitors

Expo Center of NH

2-4 pm

Ice Cream Social

Expo Center of NH

4-5 pm

Technical Conference Courses

Expo Center or Radisson Classrooms

6:30 pm

Dinner With Strangers

Lobby Lounge

FRIDAY, OCTOBER 14

8 am-10 am

On-Site Registration

Registration Desk

9 am-5 pm

Professional Development Certificate Course,

Expo Center or Radisson Classrooms

12-1 pm

Professional Development Attendee Lunch

Curriers Dining Room

PROFESSIONAL DEVELOPMENT

Professional development certificate program

PCB East 2005 is pleased to offer 12 courses in this year's Professional Development Certificate Program--three two-day Design Excellence Curriculum courses (DEC1-DEC3), and nine Tutorials (T1-T9). These technical courses of study are taught by industry experts who will provide you with the technology, theory, application and best-practice information that you need to achieve professional growth and development. Following the show, you'll receive a certificate of completion for each Professional Development course that you complete. The certificate is a bonus; the real benefit is the knowledge you'll gain and be able to apply to your career long after the conference has ended. Note: Professional Development courses are not included on the Technical Conference Proceedings CD-ROM.

TWO-DAY DEC COURSES

MON 9 AM-5:30 PM & TUE 9 AM-5 PM

DEC1--High-Speed Design--Signal Integrity, EMI and Crosstalk 

Speaker: Rick Hartley, L-3 Communication, Avionics Systems

Attendees: PCB designers, engineers and managers interested in learning and applying high-speed concepts to electronic products.

Updated for PCB East! This two-day course is a complete introduction to the high-speed design concepts needed to ensure success with designs utilizing the fast and ultra-fast ICs of today and tomorrow. In today's printed circuit boards, it's not so much the rate at which the circuit is clocked, but the output edge rate (rise/fall time) of ICs that causes signal integrity problems, EMI and crosstalk. The course will cover circuit parasitics, high-frequency currents, signal and wave propagation, propagation time and velocity, PCB properties, transmission line impedance, impedance models, trace routing and termination, major causes of signal and wave attenuation, noise and timing budgets, and the effects of vias and trace corners. Highlights will also include high-speed PCB materials, connectors in high-speed circuits, differential pairs, control of signal crosstalk, power distribution and decoupling, types of EMI, source control of EMI, control of EMI coupling, split planes and plane islands, PCB layer stack-ups, filters and filtering techniques, system RF shielding and grounding, metal vs. plastic enclosures, slots in enclosures, and conducted EMI filters. Attendees will learn about interfacing with the fabricator, PCB fabrication methods and concerns, PCB fabrication drawings, impedance testing, test coupons and cost differential of controlled impedance PCBs.

DEC2--EMI and EMC for the Design Engineer

Speaker: Robert Hanson, Americom Seminars

Attendees: PCB design engineers and engineering managers with an interest in EMI and EMC

Updated for PCB East! If you're a PCB design engineer, it pays for you to know how and why EMI testing is conducted, as well as the typical causes of failure, even if an outside company performs your actual testing. This course offers all of the EMI information you'll need--including design considerations at CAE and CAD levels--for you to provide a compliant radiation/susceptibility product. You'll examine and identify ways to prevent common EMI/EMC problems regarding power supplies, cables, connectors, slots, discontinuity of ground planes and more. This two-day class will focus on EMI and RFI issues regarding PCBs, computers, analog designs and systems, along with relevant EMI regulations in the U.S., the European Union and Asia. Highlights include PCB radiation basics, radiation and bypass on PCBs, PCB radiation suppression techniques, grounding designs/filtering, crosstalk/termination, power and ground planes, antenna loops, spread spectrum clocking, and differential-mode and common-mode radiation.

DEC3--HDI/ Microvias and Embedded Passives Design Challenges

Speakers: Happy Holden, Westwood Associates; and Mike Fitts, Mentor Graphics Corp.

Attendees: PCB design engineers, designers, managers and others interested in utilizing HDI, embedded passives and other advanced technologies.

Updated and enhanced for PCB East! This year, both Happy Holden's lecture and Mike Fitts' hands-on exercises using working CAD tools will take place on both days, instead of holding lecture sessions on Monday and hands-on exercises on Tuesday as in past years. This two-day course examines design techniques for the interconnection of area array components--from ASIC packaging and portable products to high-performance computing, telecom and dense multi-chip modules. PCB design rules, materials and selection of PCB structures (blind, buried and microvias) will be examined and compared. The tutorial will define the buffed passive technologies and other high-density SMT passives, distributed capacitance, HDI technologies, circuit ronting guidelines and materials required to permit the use of widely accepted fine-pitch and BGA components. Also, 1.0 mm, 0.8 mm, 0.65 mm and 0.5 mm fine-pitch components will be the focus of pad, spacing and layer assignments. Channel routing techniques using blind vias will show how layers can be reduced by as much as 3X, with the associated cost reductions; examples will include the 1,247 and 2,577 I/O 1.0 mm CCGAs. The tutorial further explains the costing and electrical performance of embedded passives technology. The hands-on exercises will begin with a discussion of CAD toolsets and will continue with attendees using actual toolsets to strengthen their understanding of how HDI and buried passives can help solve everyday design challenges. Previous CAD tool experience is required. Participants are encouraged to bring along their technical questions for discussion and be prepared to work in teams on a competitive basis,

Day 1: Introduction to Advanced PCBs and HDI/Microvias, by Happy Holden and Mike Fitts.

Discussion will feature design challenges, breakout and routing of fine-pitch and high I/O devices, BGMLGA layout, design rules and stackup, microvia structures, simplifying multilayers, designing blind and buried vias, and design aspects of electrical performance and signal integrity of HDI structures. Hands-on exercises will focus on HDI/microvias.

Day 2: Designing with HDI/Microvias and Buried Passives, by Happy Holden and Mike Fitts.

Discussion will cover very tiny SMT and embedded passives, materials for distributed capacitance, resistors and capacitors (including buried resistor and capacitor technologies), alternative SMT technologies, design rules, and embedded passives costing/performance tradeoffs. Hands-on exercises with EP include selecting BOM components for embedding, utilizing a cost tradeoff worksheet, and designing EP resistors and capacitors.

ONE-DAY TUTORIALS

MON 9 AM-5:30 PM

T1--PCB Design For RF Applications

Speaker: Andy Kowalewski, Sychip

Attendees: Any PCB designer who wants a basic understanding of some of the special issues revolved in PCB design for radio frequency (RF) applications.

The circuit board is a critical element in the design of RF circuits, and it has its own special characteristics that dramatically affect the way an RF design will function. This one-day workshop will present a practical guide to the many issues facing the modern printed circuit board designer, at a level suitable for the competent board designer facing RF design challenges. The instructor will cover some of the basic RF concepts, including wavelength, frequency spectrum, modulation, power measurement and capacitance, inductance, resonance and impedance. Typical components likely to be encountered in RF design will be reviewed, with discussion of their characteristics and the special care needed in their use. Issues of laminate selection, stackup planning and impedance control will be covered in depth to achieve an understanding of the problems and their solutions. Placement and routing strategies will be discussed in detail, with reference to practical circuits and their special needs when designing for RF applications.

NEW T2--DFM For Lead-Free Manufacturing

Speaker: Gary Ferrari, Ferrari Technical Services

Attendees: PCB designers, layout technicians and anyone interested in learning DFM techniques for the lead free manufacture of PCBs.

Technological advancements continue to drive our industry. The PCB designer must not only keep up with these advancements, but also adhere to a myriad of ever-changing and stringent manufacturing rules. Lead-free assembly is the latest technological change to affect the PCB designer. Cost-effective design and manufacture in leaded and lead-free environments form the fundamental building blocks for this full-day session. The class will be broken into separate interactive discussion groups to look at material issues such as lead-free laminates, high performance, HDI and surface finishes for lead-flee assembly. The groups will explore further the challenges that the Restrictions of Hazardous Substances lead-free directive pose for the fabrication and assembly processes. Lastly, the groups will look at new and innovative ways to test and verify a product's integrity in both leaded and lead-free products. There will be ample time allocated to look at individual challenges faced by the attendees. The attendee should come out of this session with a clear understanding of overall DFM issues and how they relate to the Rolls lead-free directive. Attendees with all levels of interest in the PCB design process are invited.

T3--Electronics Principles and Signal Integrity

Speaker: Doug Brooks, UltraCAD

Attendees: PCB designers and anyone interested in learning more about signal integrity.

Do inductors and capacitors confuse you? Are you unsure what lead inductance means and why we worry about bypass capacitors? Do you gasp for breath when someone says that crosstalk is related to the same loop area that causes EMI problems? Then this course is for you! We'll start with an overview of resistors, capacitors, inductors and diodes, and how and why they do what they do. Next we'll look at what happens to resistance and impedance when we combine these components together in various ways in our circuits. Then we'll look at how these principles apply to the primary signal integrity issues board designers face today--EMI, crosstalk, signal reflections and transmission lines, and power supply conditioning to prevent ground bounce. At the conclusion of the course attendees will understand the basic causes of these signal integrity problems, and many of their solutions will become apparent.

NEWS T4--Applying IC Methodologies to HDI PCB Fabrication

Speaker: Bill Greig, Greig Associates

Attendees: Anyone directly or indirectly involved in PCB manufacturing. It is ideal for the board manufacturer who wants to remain competitive in the high--or low volume, low-cost electronic manufacturing marketplace.

High-performance and high I/O count ICs are becoming increasingly more common and a new generation of packaging technologies are emerging. The Level 2 PCB is the most dominant interconnect and, in essence, the key enabler in electronic manufacturing. The PCB must now accommodate new and innovative packages without compromising overall device performance. It means PCBs now require higher wiring densities with finer lines and spaces (50 micrometers or less), smaller blind and buried vies and via pitch (50 micrometers or less). In this regard, the current laminate PCB manufacturing technology has limited capability. However, HDI PCBs are now becoming available through application of a sequential buildup (SBU) or thin film process derived primarily from the IC photolithographic process. We will discuss the new packaging and assembly technologies (including high I/O count area array packages, chip scale packages and flip-chips) that require Level 2 HDI. We will also review the IC manufacturing process, highlighting the photolithographic patterning processes in particular, and relevant equipment and operating environments.

FRI 9 AM - 5 PM

NEW T5--PCB Design 101--Where Do I Start?

Speakers: Gary Ferrari, Ferrari Technical Services; and Susy Webb, Suntron

Attendees: Entry-level PCB designers and anyone else interested in an introduction to PCB design.

Managers often ask, "Where can I send my entry-level designers to learn the trade?" This tutorial is the answer! Technical sessions at conferences often emphasize the latest techniques and technologies, but unfortunately those classes are usually too deep for the entry-level designer. This class is targeted at the entry-level PCB designer or someone just starting out in this profession. It will begin with components and the schematic, and continue through layout and post-processing. Attendees will learn how to interpret component specification sheets and schematics, how to plan component placement, ms well as routing strategies, DFM, DFT, post-processing and more.

NEW T6--Everything You Need to Know About Bypassing, Including BGAs

Speaker: Robert Hanson, Americom Seminars

Attendees: PCB designers, design engineers, EMC specialists, system architects. IC package designers and others.

In today's high-frequency designs, clock speeds of 1 GHz and edge rates less than 1 nsec are common. These high frequencies and their harmonics must be bypassed properly between power and ground to insure power delivery, switching fidelity and control of radiated emissions. To ensure that the power delivery system meets its objectives, the intelligent placement, value, size mid type of capacitors must be achieved. Also, at higher freqencies the die and interplane capacitance must be optimized. Proper via placement for return current pathway minimization, laying out digital/analog interfaces, pours (Cu fills) and splits must be carefully analyzed. This full-day tutorial will illustrate a layout process that achieves 0.1 ohm up to the knee frequency and provides methods to minimize serial/parallel resonance and achieve constant ESR.

T7--Signal Integrity Issues in PCB Design

Speaker: Doug Brooks, UltraCAD

Attendees: PCB designers and design managers.

Designers now recognize that faster component rise times mean that the circuit board itself has become an active circuit component. However, many designers do not appreciate how significant certain layout decisions can be in the ultimate performance and EMI certification of designs. Board design can often make or break a product. This tutorial will look at a variety of layout practices that can lead to noise and radiation, explain why those practices cause problems, and show how to control or eliminate noise and EMI. Emphasis will be placed on transmission lines, loop areas, bypass capacitors and crosstalk. Results from commercially available signal analysis tools will be used as an aid to understanding transmission lines and crosstalk. Fundamental issues covered in the session are: what is noise vs. EMI, what causes noise and EMI, why noise and EMI can be harmful, signal reflections and their control with transmission lines, crosstalk and its relationship to EM1, power system noise and the role of bypass caps. Attendees of this session should have a basic familiarity with PCB design

T8--RF and Microwave PCB Design and Base Materials

Speaker: Rick Hartley, L-3 Communications, Avionics Systems

Attendees: PCB designers, engineers, technicians and managers interested in learning how to apply PCB layout techniques for RF circuits.

Ultra-high signal integrity and noise control are the keys to hill functionality when designing very, high frequency analog applications. One area of paramount importance is the design and structure of the printed circuit board. This workshop is geared to help better understand the "whats" and "whys" of PCB layout and the effect of the PCB materials in high-frequency analog circuits. The course will cover impedance matching and balance, signal wavelength, propagation delay, critical trace length, noise, reflections, skin effect, loss tangent, waveguides and other RF transmission lines, and microstrip vs. stripline vs. coplanar waveguides. Attendees will also focus on RF equations and methods to resolve impedance, wavelength couplers and filters designed into the board copper, layout techniques and strategies, optimum component placement, critical routing and circuit isolation, proper grounding, mismatched loads and other discontinuities, signal splitters, tuning transmission lines, power bus and decoupling for RF circuits. Other highlights include PCB stackups for RF circuits, shields and shielding, RF PCB base material properties, choosing RF base materials, RF PCB fabrication, and RF PCB assembly.

T9--Best Practices in Implementing Lead-Free Assembly

Speaker: Dr. Ron Lasky, Indium Corp.

Attendees: Anyone interested in learning how to implement a lead-free PCB assembly process.

This may be the only workshop that focuses on the "how to" of implementing lead-free at your factory. It covers all of the relevant issues: PCB finishes, components, alloys and SMT processes. It also reviews actual implementations of lead-free assembly processes at Motorola and Hewlett-Packard. In the morning attendees will review current legislation and practices in lead-free electronics assembly. We'll review the current alloys in use and why and how they were selected, as well as PCB finishes for lead-free assembly and component concerns in lead-free assembly. Then we'll focus on best practices in SMT processes for lead-free assembly, printing, placement, reflow and wave soldering. Case studies will be reviewed, including a Motorola study on implementing a lead-free process to assemble 9 million cell phones, and a Hewlett-Packard study on large board implementation. The tutorial will finish with a section on establishing your lead-free implementation plan

Turn the page for Technical Conference courses

OCTOBER 11

TUE 8:30 AM-12 PM

010--Let's Get Smaller, Better and Cheaper: CSP, Flip Chip and 3D Technologies

Speaker: William Greig, Greig Associates

Attendees: Anyone involved in electronic/microelectronic assembly and packaging, including direct and indirect support personnel.

This course provides an overview of those enabling technologies that address requirements for "smaller, better and cheaper" end-products. Attendees will discuss packaging technologies that address miniaturization including chip scale, flip chip and 3D. This half-day course will focus on the latest developments in the assembly of active components. Technical issues and reliability concerns will be presented where appropriate. The course will highlight the current status of each of the technologies, and discuss compatibility with current and future IC requirements, as well as end-product size, performance and cost objectives.

NEW 011--Introduction to Fullwave SI and EMC Modeling

Speaker: Bruce Archambeault, IBM 

Attendees: PCB designers, design engineers and anyone interested in fullwave modeling for signal integrity and EMd

Based on the instructor's popular book "EMI/EMC Computational Modeling Handbook," this class provides a summary of the various modeling techniques available today, and more importantly, the strengths and weaknesses of each technique. EMI/EMC compliance and signal integrity are much more important than ever before, due to higher-speed electronics in lower-cost packages. The old ways of best-guess design practices, followed by fixing the problems after the product is built, are not acceptable in today's marketplace. New simulation tools allow a more accurate estimation of the EMI/EMC/SI effects on a system, before that system is ever built. While the technology of today cannot completely analyze the entire system with a signal model, separate parts of the system can be successfully modeled and accurate results obtained. This workshop will help attendees understand which modeling technique will work best for a given set of problems. Class discussion will focus on validation of modeling techniques and modeling codes, as well as standard modeling problems to allow engineers a more complete evaluation against potential vendor software packages.

NEW 012--PCB Design With Flip Chips

Speaker: Andy Kowalewski, Sychip

Attendees: Any PCB designer who wants an understanding of the special issues" involved in printed circuit board design with flip chip components.

This half-day workshop will present a practical guide to the many issues facing the modern printed circuit board designer, at a level suitable for the competent board designer facing design miniaturization challenges. The instructor will cover the critical tradeoffs relating to miniaturization of circuit boards using flip chips, the ultimate chip scale package. Advantages and disadvantages of different types of packaging will be discussed and compared to flip chip technology. Known good die and underfill issues will be covered, together with a detailed look at die rebumping for circuit board mounting. Trace and space difficulties, fanouts, laminates and via technologies will be discussed. Detailed consideration of PCB design, assembly and fabrication for RF will be presented, along with lead-free and reliability issues.

TUE 9-11 AM

NEW 013-Introduction to Embedded Passives

Speaker: Richard Snogren, Bristlecone LLC 

Attendees: Anyone interested in embedded passives, but unfamiliar with EP technology.

This is a practical ground-floor workshop to introduce embedded passives to designers and others unfamiliar with the technology. This course presents market drivers, product performance benefits mid relative cost factors, as well as an overview of the state-of-the-art of embedded passive resistor and capacitor materials and processes. This highly informative workshop is an excellent starting point for engineers and designers wanting to strengthen their understanding before launching their own embedded passives journey.

TUE 1:30-5 PM

020-Impedance Analysis and Specifications

Speaker: Happy Holden, Westwood Associates

Attendees: PCB engineers, designers, managers and others interested in controlled impedance boards.

The need for higher information throughput and speed has promoted the increasing use of controlled impedance multilayer PCBs. This workshop is an introduction to controlled impedance. It explains in simple terms why controlled impedance is required. The various equations will be presented, as well as numerical solutions and field solvers. These will be compared with "as-measured" TDR readings. Resources for impedance analysis on the Internet will be detailed and the variability of impedance due to manufacturing tolerances will be explained. Finally, how controlled impedance should be documented on fabrication drawing will be illustrated.

NEW 021--PCB Design For Real World EMI Control

Speaker: Bruce Archambeault, IBM

Attendees: PCB designers, design engineers, and anyone interested in controlling EMI.

Based on the popular book by the same title, this workshop will focus on the most important potential causes of EM1 that PCB designers face. Multilayer PCBs typically contain a number of different high-speed signals. Successful routing of all these signals often requires violating some of the standard EMC "rules." However, not all EMC rules are created equal; some are more important than others. Routing and the return current path, especially, are two of the most significant causes of EMI. Significant design attention must be paid to both the signal trace and the signal return path to minimize EMI emissions (and signal integrity problems at high data rates). In addition to the most important EMI-causing design issues, the decoupling of power and ground reference planes is an important issue for EMI emissions control and circuit functionality. Decoupling strategy, which has generated a lot of technical papers and controversy, will be a focus of this workshop.

NEW 022--Embedded Passives in PCBs Now!

Speaker: Richard Snogren, Bristlecone LLC

Attendees: PCB designers and others interested in state-of-the-art embedded passives technology. This is not an introductory class. Attendees not yet exposed to embedded passives are strongly urged to take Snogren's "Introduction to Embedded Passives" Tuesday morning.

This half-day workshop is an intense review of the state-of-the-art of today's commercially available embedded passive technology. The course starts with passive component functions and performance drivers to embedded passives. This leads into an in-depth discussion of today's commercial material sets; their electrical and physical characteristics; a useable selection rationale; design, test, and trim tools; and DFM guidelines for implementation. The presentation includes a detailed discussion of the relative costs of the various technologies and a methodology for cost analysis. The class concludes with a review of industry, initiatives on embedded passives.

NEW 023--Lead-Free For Fabricators

Speakers: Ed Kelley, Polyclad; and Joe Renda, Enthone

Attendees: PCB fabricators, designers and anyone interest ed in the effects of lead free processes on fabrication.

The push for lead-free solder techniques has led to many investigations into PCB materials and finishes, primarily based on the technology's performance during the build process. This course will present details of the effects of lead-free assembly seen at PCB fabrication and the need to respond to and understand these changes. The instructor will share experiences and educate engineers regarding the various PCB materials and surface finishes, and the specific changes required in the PCB build process to allow lead-free compatibility. Successful material selection always comes back to the physics of electrical and material properties used for the PCB.

TUE 2-4 PM

NEW 024-Skin Effect on PCB Traces

Speaker: Doug Brooks, UltraCAD

Attendees: PCB designers and others interested in skin effect on PCB traces.

Many of us learned that the impedance of capacitors and inductors varies with frequency, but resistance does not. As rise times continue to get faster and frequency harmonics on our boards continue to get larger, this assumption about resistance is no longer true. Skin effect causes the effective resistance of a wire or trace to increase with frequency. If you don't know what skin effect is, how it affects resistance and what the proximity effect is, this is the class for you. Attendees will learn what causes skin effect, when it becomes an issue, how it effects our circuits and what, if anything, can he done about it.

OCTOBER 12

WEd 8-11 AM

030--Materials For High-Speed Design

Speaker: Rick Hartley, L-3 Communication, Avionics Systems

Attendees: PCB designers, design managers and design engineers.

In a high-speed setting, circuit performance is dependent upon several characteristics and variables. Items such as the spacing between a forward signal (circuit trace) and its return path, the trace width, trace thickness, trace length and numerous other variables all help to determine circuit performance. How much each of these variables enters into circuit performance is greatly affected by the characteristics of the base material upon which the circuit is placed. This course will discuss various base materials commonly used in high-frequency and high-speed circuits, as well as their variables that affect performance. Additionally, the advantages and disadvantages of each material will be detailed.

NEW 031-New Test Methods For High-Speed, High-Frequency PCBs

Speaker: Robert Hanson, Americom Seminars

Attendees: PCB designers, design managers and others interested in testing high-speed and HDI boards.

Due to high-speed, stackup restrictions, blind/buried vias and many other limitations, traditional test methods may not provide the capabilities to test today's high-speed, high-frequency PCBs. This course will define why traditional test methods--clamshell fixtures for bareboard testing to detect opens/shorts, MDA and ICT for fault detection/fault isolation on the production line, and functional test using rack and stack hardware at the operational level--are losing applicability. This class also will define new methods of test that confront the restrictions and in turn provide cost-effective solutions. Attendees will learn much more, including: What is microsectioning testing and what will it accomplish when testing blind and buried vias? Why is vision testing (AOI, x-ray, laser) becoming more popular for testing blind vias? Why is flying probe (F/P) and vision being used at receiving/inspection (R/I)? What test strategies dictate using either test at R/I? How do we use new F/P techniques in lieu of TDR or VNA? How do we conduct Zo test at bare board using TDR or VNA? How do we test when the via/pad can't be contacted using traditional ICT/MDA BON techniques?

NEW 032--Designing With Your "Thumbs"

Speaker: Susy Webb, Suntron

Attendees: PCB designers and layout professionals.

Have you ever wished someone would compile a list all the general rules of thumb for laying out different kinds of boards? Have you ever wanted to sit with a mentor and really absorb "all those little tidbits of information that he understands so well and uses so readily? How about a set of general guidelines for routing, planes, stackup, high speed, EMI and more? This course is a compilation of pieces of information gleaned from many technical sources and years of design work. It will provide general rules of thumb for the ways things can be done to achieve successful board designs, and give brief explanations about why they need to be done that way.

NEW 033--Technical Requirements For Sourcing PCBs in Asia

Speaker: Happy Holden, Westwood Associates

Attendees: PCB designers, design managers, layout technicians and anyone interested in making sure their designs are manufacturable globally.

One of the secrets to producing low-cost boards is manufacturability. This workshop will highlight the issues, choices, alternatives and conditions that designers need to consider in order to make a printed circuit board manufacturable in Asia, especially China. You will learn how to determine ff a fabricator is capable of handling an order; how to use IPC-9151 Capability Benchmarking to select fabricators; when you should use controlled impedance; plating, finishes and thickness distribution; mechanical and image tolerances; numerous typical tolerances of PCB fabricators, as well as fabricators' nominal capabilities; materials, multilayer stackup and hole plugging; thieving, plating concerns and why plating thickness varies; calculations vs. 2D field solvers; and much more. If there were ever a time to have a full understanding of DFM, then having your boards built in China is that time!

WED 9-11 AM

NEW 034--Routing for Complex Shapes

Speaker: Bruce Rietdorf, Zuken

Attendees: PCB designers. CAD managers who are interested in the challenge of routing curves and complex shapes.

This course analyzes the added design difficulties created by flexible circuits, mainly routing for applications with complex shapes. Attendees will review how these barriers can be overcome using design engineering techniques and by applying different software. Discussion will also focus on issues associated with true curved routing, as well as how to deal with the unique problems posed by rigid-flex.

NEW 035--Constraints-Based PCB Design

Speaker: Ralf Bruening, Zuken

Attendees: PCB Designers and CAD managers interested in high-speed digital PCB designs.

Defining design constraints within EDA applications has never been more important. The rise in component speed and the increased density and complexity of PCBs are driving the use of constraints, but they can be double-edged swords. This overview will review the constraints that are key to succeeding in high-speed design, and how to best utilize them in your design process. The discussion will focus on how to determine the best constraints and judge the potential trade-offs between different constraints (as these may sometimes contradict). The class will also gain an insight into constraints that are set to become more important in the future, such as EMC/EMI-related design constraints.

WED 2-3 PM

NEW 040--Using Network Analyzers to Measure PCBs at GHz Frequencies

Speaker: Bruce Archambeault, IBM

Attendees: PCB designers, design engineers and others interested in measurements at GHz frequencies.

This course discusses the various calibration techniques, their pros and cons, and other time domain gating techniques that can extend the useful frequency range of the network analyzer. The ability to measure loss for high-speed traces on PCBs has become very important. Designers are challenged to use low-cost dielectric materials while maintaining good signal quality over long traces. Understanding the loss for different dielectric materials, trace configurations and connectors is vital to optimizing the design. But simple network analyzer measurements can be misleading at frequencies above about 5 GHz. Mismatch between the SMA connectors used to inject the signal and the actual trace on the board can cause resonances that will predict significant distortion on the actual trace. However, this is a measurement artifact that can be eliminated with careful calibration and other techniques. Attendees will learn these techniques and other tricks for using network analyzers at GHz frequencies.

NEW 041--Effective Library and Design Data Management

Speaker: Steve Chidester, Cadence

Attendees: PCB designers, design managers and CAD librarians.

Historically, product data management (PDM) has been focused in the mechanical domain. But board-level library and design data management introduce challenges not present in the mechanical world. This course will describe methods for integrating the board-level design flow with a data management system, how this integration enables the engineering team to collaborate and how this leads to more effective design and manufacturing outsourcing.

Discussion will also focus on additional benefits of electronic design management, such as revision control and design reuse. As board-level design continually becomes more complex and the size of engineering teams increase, there is growing need for effective management of board-level design and component data. If utilized correctly, board-level design tools and processes can be integrated with PDM/PLM offerings for more effective library management, work-in-progress design data management (for concurrent design), and release data management at the enterprise level. This enables the design team to collaborate more effectively, reuse design data and manage their processes across workgroups, both inside and outside the firewall.

NEW 042--Lossy Transmission Lines and Eye Diagrams

Speaker: Doug Brooks, UItraCAD

Attendees: PCB designers and anyone interested in transmission lines at high frequencies.

This class provides a short look at what happens when we go to ever-higher frequencies down transmission lines, and what kinds of losses can occur. Simulations using Mentor's Hyperlynx tool will illustrate the effects of these losses. There are no prerequisites for this course.

WED 2-4 PM

NEW 043--Designing and Building PCBs Globally

Speaker: James Bergeron, Motorola

Attendees: PCB designers and CAD support personnel.

Designing across local, state and international borders is on the rise. But why take designs and ship them around the globe? Is design sharing a viable option? Can a U.S. engineering team take a viable design, distribute it to several locations and have modules designed simultaneously? The issues mid answers are multifold. This presentation will focus on using tools and process management methods to solve these roadblocks. Methods for successfully moving from design concept through fabrication, across different geographies, will be discussed. Problems to be addressed include design reviews, processes, tools and verification, as well as multisite design concerns related to fabrication--test and verification often change from vendor to vendor. Discussion will focus on strict document and process control, and successful tool deployment to achieve positive results from your fabrication shops.

WED 4-5 PM

NEW 044--The "Ground" Myth

Speaker: Bruce Archambeault, IBM

Attendees: PCB designers, design engineers and anyone interested in learning more about ground

This presentation discusses the origin of the word "ground," what we really mean when we use the term, and how to optimize our designs to achieve the over all goals for our reference strategy. Ground is considered to be a zero potential region with zero resistance and zero impedance at all frequencies. But this is just not the case in practical high-speed designs. The one thing that should be remembered whenever the term ground is used is that "Ground is a place where potatoes and carrots thrive!" By keeping this firmly in mind, we can avoid many SI and EMC emissions problems. Ground is a fine concept at DC voltages, but it just does not exist at the frequencies running on today's typical PCBs.

NEW 045--FPGA I/O Design

Speaker: Dave Brady, Mentor Graphics

Attendees: PCB designers and anyone interested in a more efficient process for designing FPGA I/Os.

In this workshop, attendees will examine the FPGA I/O design process in detail and learn to overcome the obstacles to leveraging FPGA devices during complex system design implementation. The class will also examine the FPGA I/O design process by focusing on the common challenge of connecting a FPGA device to a modern memory device. By following this simple example through the design flow, the contributions of each member of the complete design team toward FPGA I/O design and refinement will be discussed in detail. At the conclusion of the discussion, attendees should understand that FPGA I/O design is a team sport that can lower PCB manufacturing costs.

NEW 046--Signal Timing Issues: Crosstalk Effects in Serpentine Traces

Speaker: Doug Brooks, UItraCAD

Attendees: PCB designers and anyone interested in signal timing issues.

Why do we adjust signal timing? And if we snake our lines too close together, crosstalk between segments can occur-crosstalk that can impact the integrity of the signal. This class provides a look at signal timing issues and what can be done to protect the integrity of the signal.

OCTOBER 13

THU 8-11 AM

NEW 050--Cooling Fundamentals For PCB Designers

Speaker: Andy Manning, Flomerics

Attendees: PCB designers who are increasingly coming across thermal issues in their everyday work environment.

The need to consider thermal issues in board design is increasing for board designers. Since 1999, thermal densities on boards have risen by over 200%, and the associated complexity has similarly increased. However, in many instances, problems associated with the rise in thermal density can be quickly and simply resolved at early stages in the design cycle. The purpose of this workshop is to provide a fundamental understanding of heat transfer at the board level, and to illustrate practical and analytical techniques that will help board designers solve electronics cooling problems at the board mid component level. Attendees will also be introduced to currently available design tools, and their strengths and weaknesses will be discussed.

051--Designing With Embedded Passives

Speaker: Rick Hartley, L-3 Communication, Avionics Systems

Attendees: PCB designers, design engineers, systems engineers, managers and others interested in learning hour to design PCBs with embedded resistors and capacitors.

Many seminars discuss the basics of embedded technology, but methods for designing with embedded passives has not been covered well, especially for CAD systems not designed to work with components on inner layers. This course will discuss practical, easy-to-use information for designing PCBs with embedded devices, using any CAD system. Attendees will begin with the basics on how embedded passives are produced (both additive and subtractive processes), some seldom discussed advantages, when to use and when not to use embedded passives, realistic tolerances, calculating values and basic design flow. Highlights will include handling embedded devices in the schematic, designing the device footprint, placement and routing of embedded passives, balancing the PCB, design rule checking and CAD output file generation and documentation.

NEW 052--Survivor! Escape From a Chaotic Design Process Speaker: Susy Webb, Suntron

Attendees: PCB designers and design managers.

It is easy for a designer to fall into patterns of doing things the same way every time without really thinking about it. But an approach that works well for one project may but be sorely lacking for another. This course is a compilation of things that seasoned hoard designers do to make the processes of designing PCBs more streamlined and manageable. It will involve organizing the input process, getting the most out of your software, working together with a team, and making layout, ECO, mid checking issues more manageable. The course is not intended to be a "how to" class, but rather a presentation of helpful ideas to get the designers thinking in more creative ways about the processes that will work for them.

NEW 053--High-Speed Clock Control

Speaker: Robert Hanson, Americom Seminars

Attendees: PCB designers, design engineers and others.

This class will discuss the issues of skin effect, proximity and dielectric loss on transmission characteristics. Edge rate harmonics, pre-emphasis, equalization, harmonic amplification, PAM 4 coding and line length vs. attenuation will be covered.

NEW 054--Fundamentals of DFT

Speaker: Gary Ferrari, Ferrari Technical Services

Attendees: PCB designers, design managers, layout technicians and others.

The term "DFT" (design for test) has a different meaning depending on whether you are dealing with a bare printed board, a final assembly or a board in the held. This course will help you define DFT issues as they relate to design and cost in the fabrication and assembly processes. The discussions will focus on fabrication and assembly issues that affect the design of a product. Some of the materials presented in this course will utilize existing and/or proposed IPC standards. These "snapshots" will fortify the discussion, as well ms provide you with guidelines for applying IPC standards to your designs in order to more easily produce cost-effective, right-the-first-time PCBs.

THU 4-5 PM

NEW 060--Embedded Passive Components: A Technology Primer

Speaker: Per Viklund, Mentor Graphics

Attendees: CAD managers and PCB designers who want an overview of available embedded passive technologies.

Embedded passives enable designers to build products that would otherwise suffer from weight, cost, size and performance issues. This technology is rapidly being deployed as a powerful means to fight competition and to gain a competitive edge. In this technology primer, we will look at the state of materials and technologies and look at the decision factors involved in deployment. Risks and benefits will be discussed, as well as manufacturing data formats and test data to support embedded passive manufacturing will be covered with respect to suitable formats. We will also look at design methodology and design flow from schematic to manufacturing and test data for different types of embedded passive technologies.

NEW 061--Decoupling Capacitor Design for High-Speed PCBs

Speaker: Bruce Archambeault, IBM

Attendees: PCB designers, design engineers and o/hers interested in decoupling cap design.

Decoupling of power and ground-reference planes is an important issue for both EMI emissions control and circuit functionality. This topic has generated a lot of technical papers and controversy. While there has been a lot of attention paid to this topic, there is still significant confusion about the best strategy for decoupling. This talk focuses on the sources of noise that the decoupling capacitors are intended to control, the physics involved in the noise propagation and how to properly analyze the decoupling capacitor performance. The analysis must be performed in both the time domain and the frequency domain. The frequency domain analysis is a steady state analysis, and will determine resonances, which are most useful for EMI emissions analysis. The time-domain analysis is a transient analysis and will help determine how well the current is delivered to the IC, and ultimately how large (or small) the generated noise pulse will become. Real-world examples of measurements, as well as computer simulations, will be used to demonstrate the optimal decoupling strategy.

NEW 062--Current Flow in PCB Traces

Speaker: Doug Brooks, UItraCAD

Attendees: PCB designers, engineers and others interested in current flow.

Most of us have heard that current flows in a closed loop and is constant everywhere in the loop. Yet we also know that there is a prupagation delay as current flows down a trace. How can there be a propagation delay as current flows, and how can current be constant everywhere, both at the same time? If this question has bothered you, come learn how currents flow down transmission lines--terminated and unterminated--and down differential traces. There are no prerequisites to this course.

5 Great Reasons to Attend PCB East 2005:

1 A grand total of 42 Professional Development and Technical Conference course--more than 30 of which have never been taught at PCB East!

2 Twelve Professional Development Certificate courses taught by top industry experts that will put a. certificate on your wall, a smile on your supervisor's face and new skills in your bag of design tricks!

3 A variety of new and revamped events designed to help you network with your peers, speakers and exhibitors--including Dinner With Strangers, Trivia Night, Pub Night at Jillian's and an old-fashioned Ice Cream Social!

4 More time on the show floor thanks to a rearranged conference schedule that provides you with the best conference value--bar none--in the PCB design industry!.

5 A celebration in honor of PCB East's 10th anniversary during the Opening Night Reception, and a very special announcement that will be kept under wraps until the show!

Key Dates to Remember

Early-Bird Discount Deadline

September 9, 2005

You must register before this date to save $100 on most registration packages!

Radisson Hotel Group Rate Deadline

September 19, 2005

You must reserve your single/double room before this date to receive the special rate of $142 per night.

AVIS Discount Rate Deadline

September 19, 2005

You must reserve your car by this date to receive the PCB East discount.

Pre-Show Online Registration Deadline

October 3, 2005

Pre-register online by this date, so your badge and other materials will be ready for pickup.

SPEAKER BIOGRAPHIES

DR. BRUCE ARCHAMBEAULT is the lead EMC engineer at IBM in Raleigh, NC, responsible for EMC tool development and use on a variety of products. He has a BSEE from the University of New Hampshire, an MSEE from Northeastern University and a Ph.D. from the University' of New Hampshire. Archambeault developed computational electromagnetic EMC-related software tools at Digital Equipment Corp. and SETH Corp., and in 1997 he joined IBM. Archambeault is the author of numerous technical papers and the book "PCB Design for Real-World EMI Control", and is the lead author of "EMI/EMC Computational Modeling Handbook." E-mail: [e-mail]

JAMES BERGERON has 25 years of experience with PCB design. In his current position with Motorola, he manages and deploys design tools, customizations, libraries and environments globally to assist with Motorola's Design Anywhere-Build Anywhere initiative. Be began at MIT-Lincoln Laboratory, designing modules for satellite communication terminals. Bergeron has held designer positions with Clearpoint, Fostex R&D and General Electric Industrial Systems Division. At GE he migrated from design to supporting CAD tools and developing customization for the PCB design team. E-mail: [e-mail]

DAVE BRADY has over 20 years of electrical engineering and EDA experience with both PCB and IC design disciplines. Brady helped introduce RTL design and synthesis methods for IC design and developed design methods for concurrent FPGA and PCB design. Brady is currently the integrated system design product marketing manager for Mentor Graphics. E-mail: [e-mail]

DOUGLAS BROOKS has a BSEE and MSEE from Stanford University and a Ph.D. from the University of Washington. He has held positions in engineering, marketing and general management with Hughes Aircraft, Texas Instruments and ELDEC. In 1992 he formed UltraCAD Design Inc., a service bureau in Bellevue, WA. Brooks has written numerous articles and is a frequent speaker at various conferences. He is the author of "Signal Integrity Issues and Printed Circuit Board Design." E-mail: [e-mail]

RALF BRUENING is a product manager for Zuken's high-speed design, SI & EMI verification tools at Zuken. He has been working in EDA for more than 16 years. At Nixdoff Computer AG he worked on digital circuit simulation and used various PCB layout and post-processing tools. He then became a software developer at CADLAB, and in 1994 joined INCASES, which was acquired by Zuken in 2000. Since then he has been involved in product planning, development and product marketing of Zuken's PCB simulation and verification tools. E-mail: [e-mail]

STEVE CHIDESTER has been with Cadence Design Systems for more than 12 years. He is currently working with a team developing board-level library and design data management solutions. During his 25 years in the PCB design business, Chidester has worked as a schematic drafter, printed circuit designer and applications engineer. E-mail: [e-mail]

GARY FERRARI is the owner of Ferrari Technical Services, a consulting firm specializing in technical support and customized training. He is the past executive director and cofounder of the IPC Designers Council. He has over 38 years of experience in electronic packaging with an emphasis on PCB design and manufacturing. Ferrari has chaired a number of IPC technical committees, including the Printed Board Design Committee, the Computer-Aided Design Subcommittee, the Printed Board Complexity Subcommittee and the IPC-D-275 Design Subcommittee. He has written numerous technical articles, and has provided DFM consulting services to the industry. Ferrari received the IPC President's Award in 1990. E-mail: [e-mail]

MICHAEL FITTS is product marketing manager for layout products at Mentor Graphics. He has been involved in the design of HDI substrates since 1992. Since 1995, he has been lecturing and consulting on advanced technology and design. He is a regular speaker at conferences worldwide and has written technical articles for various publications on advanced technology. Previously, Fitts was president of The Solution Fitts Inc., an electronic engineering consulting firm located near Boulder, CO. E-mail: [e-mail]

WILLIAM GREIG, of Greig Associates, has been an independent consultant for 13 years. He previously worked for RCA Semiconductor, General Electric Reentry Systems, Lockheed Electronics and NASA. Greig specializes in advanced microelectronic packaging, assembly and reliability, including HDI interconnects (MCMs, PCBs), and chip-on-board assembly technology (chip and wire, flip chip, chip-scale packaging). He holds six U.S. patents and has published extensively. Greig is a member of SMTA and IMAPS, and is the president of the Garden State Chapter and a Society Fellow. E-mail: [e-mail]

ROBERT HANSON, MSEE, is president of AmeriCom Seminars. As a digital design engineer at Boeing, Rockwell, Honeywell and Loral, Hanson designed and provided prototype operational analysis on many high-speed designs, including PCBs, for the AWACS, B1-B, 747-400, missiles and ground support test equipment. He currently teaches high-speed digital design courses throughout the United States, Europe and Asia. E-mail: [e-mail]

RICK HARTLEY is a senior design engineer and PCB specialist at L-3 Communication, Avionics Systems. He has 39 years of experience in the electronics industry and has dedicated the past 29 years to PCB and circuit development with emphasis on control of signal integrity and control of EMI, in both digital and RF PCBs. E-mail: [e-mail]

HAPPY HOLDEN is the manager of Advanced Technology for Westwood Associates. He is responsible for next-generation printed circuit manufacturing strategies, advanced design tools, packaging systems and competitive analysis. Prior to joining Westwood, he was a senior consultant at TechLead Corp. and Merix. He retired from Hewlett-Packard in 1996. He holds a BS in chemical engineering and an MS in computer science from Oregon State University. He has published over 80 technical papers and contributed to three books. E-mail: [e-mail]

ED KELLEY is OEM marketing manager, Polyclad Laminates/Cookson Electronics PWB Materials & Chemistry. He is responsible for OEM marketing and equipment manufacturing marketing. Kelley previously served as senior engineering maanger for Sanmina-SCI in Derry, NH. E-mail: [e-mail]

DR, RON LASKY is a senior technologist at Indium Corp. and a visiting professor at Dartmouth College. Prior to these assignments, he had over 20 years of experience in electronic and optoelectronic packaging at IBM, Universal Instruments and Cookson Electronics. Lasky holds numerous patent disclosures and is the developer of several new concepts in SMT processing software related to cost estimating, line balancing and process optimization. He has four college degrees, including a Ph.D. in materials science from Cornell University. Lasky is the recipient of the 2003 SMTA Founder's Award. E-mail: [e-mail]

ANDY MANNING is the director of thermal engineering at Flomerics, responsible for all activities in the thermal engineering department. He has a bachelor's in engineering and a Ph.D from the University of Nottingham in the UK. He joined Flomerics Ltd. in 1994 and moved to Flomerics Inc., the U.S. division, in 1997. E-mail: [e-mail]

JOE RENDA is a OEM marketing manager, Enthone PCB Chemistry. He is responsible for implementing a strategic marketing plan to increase product qualifications at key manufacturers. Renda has been with Cookson for over 10 years, and he holds a BSEE from Northeastern University. E-mail: [e-mail]

BRUCE RIETDORF is a senior applications engineer for Zuken USA Inc. He has more than 30 years of experience in electronic packaging with an emphasis on PCB design and manufacturing. Rietdorf has been a PCB designer, PCB design service group manager, coordinator of electrical CAD/CAM operations, and served as administrator of electrical drafting standards at Magnavox in Fort Wayne, IN. He has chaired a number of IPC technical committees, and he received the IPC President's Award in 1988. E-mail: [e-mail]

RICHARD SNOGREN is the founder of Bristlecone LLC, a technology consulting service supporting military and industry clients. Snogren's background includes active membership in the recent Advanced Embedded Passive Technology Research Consortia, an interdisciplinary research project funded by NIST; director of field applications engineering for Coretec Inc.; cofounder of SAS Circuits; NS manager of electronic packaging and PCB design operations for Martin Marietta Astronautics. He has researched and developed processes for embedding ceramic thick-film materials into organic PCB substrates, authored numerous papers and conducted many workshops on embedded passive technology. E-mail: [e-mail]

PER VIKLUND is a product marketing manager at Mentor Graphics responsible for embedded components, RF and advanced packaging solutions. He has more than 25 years experience with electronic design and has spent the last 18 years with design tools for advanced technology layout. E-mail: Per_Viklund@ Mentor.com

SUSY WEBB is a senior PCB designer with 26 years of design experience. She has worked in a variety of fields, including point-to-point microwave network systems, oceanographic oil exploration equipment, and CPCI and ATX computer motherboards. Webb has set up standards, procedures and library conventions for departmental use. She is CID certified, and is an active member of the IPC Designers Council, a past president of the council's Houston Chapter and a current member of its national executive board, high speed and education committees. E-mail: [e-mail]

HOTEL AND TRAVEL

Headquarters Hotel

RADISSON HOTEL MANCHESTER 700 Elm Street, Manchester, NH 03101 Tel: [phone] or 800-333-3333 Fax: [phone] Special Single/double PCB East Rate: $142

To reserve your room at the special rate of $142, you must identify yourself as being with PCB East. The group rate cutoff deadline is September 19, 2005. Be sure to reserve your room early to get the group rate and ensure that you'll be where the action is. In 2004, the hotel sold out several weeks prior to the show.

The Radisson Hotel Manchester is known for its hospitality, graciousness and friendly, personal service. Hotel amenities include: 250 newly remodeled guest rooms and suites, wi-fi high-speed Internet access throughout the hotel, an executive business center, a specialty gift shop, a health club with indoor pool, whirlpool, saunas and two restaurants--JD's Tavern and Care on the Park.

Parking: $1 per day with a voucher for registered attendees. Pick up a parking voucher at the conference registration desk.

Exhibition Center

The PCB East 2005 two-day product and service exhibition will be held on October 12-13 in The Expo Center of New Hampshire, which is attached to the Radisson Hotel Manchester. The address is the same as shown above for the hotel. Parking for registered attendees is $1 per day with a voucher. Pick up a parking voucher at the registration desk.

Travel

Car Rental Information

AVIS is the official rental agency for PCB East. Call 800-331-1600 or go online at www.avis.com to rent a car. Refer to AVIS Worldwide Discount (AWD) #D900888 when making your reservation in order to receive a special conference rate.

Other Transportation

The Radisson Hotel Manchester is located 5 miles from Manchester Airport and approximately 1 hour from Logan International Airport in Boston. Complimentary shuttle service is available from the Manchester Airport. Use the courtesy phone in the Manchester Airport baggage claim area to let the operator know you need transportation.

Driving Directions

FROM BOSTON

Take route 93 North to route 293 North (left hand exit off route 93). After the Brown Avenue exit, stay to the right, as route 293 bears right. Stay on route 293 to the second exit (Exit #5 Granite Street). Take Exit #5 Granite Street and turn right off the exit ramp. Go through two sets of lights. The Radisson Hotel garage will be on your left.

FROM NEW JERSEY, NEW YORK AND CONNECTICUT

Take route 95 North to New Haven, then route 91 North to Hartford. From Hartford, take route 84 to route 90 (Mass Pike). Take Mass Pike to route 290 (Worcester) to route 495 (Lowell) to route 3N (Nashua). Stay on route 3 following the signs to Manchester. Just south of Manchester, route 3 becomes route 293 North. Take exit #5 Granite Steet. Turn right at the end of the exit ramp. Go through two sets of lights. The Radisson Hotel garage will be on your left.

For additional driving directions and area maps, visit www.radisson.com or www.manchestercvb.com. Get door-to-door directions at www.mapquest.com.

REGISTRATION INFORMATION

Discounts

PCB East 2005 is pleased to offer the following discounts to qualifying attendees. Except for the Early-Bird Discount, all other discounts are only available by phone. Call the registration desk at 918-496-1476 for more information or to register using these discounts.

Early Bird Discount--Anyone who registers by September 9, 2005, for the Registration Packages shown at right will automatically receive $100 off regular tuition pricing.

Alumni Discount--Alumni of a previous PCB Design Conference (West, East or Road Series) are eligible for a discount of $50 US off conference tuition.

Association/User Group Discount--A member of IPC Designers Council and/or another recognized industry user group is eligible for a discount of $50 US off conference tuition.

Group Discount--Companies registering 3 or more attendees at the same time for 4-Day or 5-Day Special Value Passports are eligible to receive a $ 100 discount per attendee, deducted from the applicable package pricing (Early-Bird or regular). All three (or more) registration forms must be received or called in together. Please note: group discounts are not available through online registration. Call 918-4961476 for more information.

Registration Policies

Registration--Complete one Registration Form for each registrant. All 5 sections must be completed.

Payment--Payment must be made by credit card, check or U.S. government Purchase Order. Registrations without complete payment information will not be processed. If paying by PO, please include a $25 US processing fee per PO number in addition to the registration fee. PO payment must be received in full prior to the show for your registration to be processed. For more information about our payment policies, call 918496-1476.

Refunds and Cancellations--All refund requests must be made in writing by fax or mail to PCB Design Conference East no later than September 26, 2005. Mail refund requests to: PCB East, Attn. AS, 2018 Powers Ferry Road, Suite 600, Atlanta, GA 30339. Fax to 678-589-8850 or e-mail your refund or cancellation request to [e-mail]. "No shows" who have not made a written request by September 26, 2005, are fully liable for conference tuition/fees. Registrations made after September 26 are considered confirmed and no refund requests will be accepted; registrants will be fully liable for conference tuition/fees and will be invoiced accordingly.

Program Changes--The technical program of PCB Design Conference East is subject to change should unforeseeable circumstances arise with respect to individual speakers. Check the PCB East Web site for the latest updates on sessions and speakers.

ADA Accommodations--If you require special accommodations as outlined under the ADA, please contact Alyson Skarbek, Show Operations Manager, at 678-589-8865 by September 26, 2005.

PCB East 2005 Registration Packages

After you look through the list of Professional Development and Technical Conference courses on pages 5-11, you'll need to decide which registration package best fits your needs and your budget. You'll also have to register for specific courses. To help you make this decision, each package is described in detail below. For pricing, see the Registration Form on page 15. If you have questions about our packages, discounts or policies, please contact the Registration Desk at 918-496-1476.

Professional Development Only

* One-Day Tutorial Only Passport--Includes a one-day tutorial, course handouts, plated lunch and Certificate of Completion, plus admission to the Welcome Luncheon and Industry Icon Roast (if taking a Monday tutorial), two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. See page 15 for pricing. Note: Alumni and Association/User Group discounts do not apply for this package.

* Two-Day DEC Only Passport--Includes a two-day Design Excellence Curriculum (DEC) course, course handouts, plated lunch (both days) and Certificate of Completion, plus admission to the Welcome Luncheon and Industry Icon Roast, two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. See page 15 for pricing. Note: Alumni and Association/User Group discounts do not apply for this package.

Technical Conference Only

* 1-Day Technical Conference Passport--Includes morning and afternoon sessions during a single day of the Tuesday through Thursday Technical Conference, plus admission to the two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. See page 15 for pricing. Note. Alumni and Association/User Group discounts do not apply for this package.

* 3-Day Technical Conference Passport--Includes your choice of sessions during the entire Tuesday through Thursday Technical Conference, plus admission to the two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. See page 15 for pricing.

Special Value Passport Packages

* 4-Day Special Value Passport (a terrific education value)--Includes any combination of Professional Development courses and Technical Conference sessions taken four days in a row (choose from Monday through Thursday or Tuesday through Friday), plus admission to the two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. (Note: Tutorials and DEC courses include a plated lunch.) See page 15 for pricing.

* 5-Day Special Value Passport (the most bang for your buck)--Includes any combination of Professional Development courses and Technical Conference sessions-you decide--plus admission to the PCB Technology Forum, two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social. (Note: Tutorials and DEC courses include a plated lunch.) See page 15 for pricing.

Exhibition Only

* Exhibition Only Package--Includes admission to the two-day exhibition, Keynote Address, Opening Night Reception, Pub Night at Jillian's and Ice Cream Social.