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0-In Check-Lite Offered Free to Qualified Design Groups; No-Cost License for Popular Features of Premier Assertion Tool -- 0-In Check.


Business Editors/High-Tech Writers

SAN JOSE--(BUSINESS WIRE)--Jan. 28, 2002

Today 0-In Design Automation, Inc., The Assertion-Based Verification Company, announced the availability of 0-In Check-Lite to speed the adoption of assertion-based verification. 0-In Check-Lite makes assertion-based verification with 0-In's efficient pseudo-comment directive specification style and an easy to use CheckerWare(TM) library available at no cost to qualified Verilog design groups.

White-Box Verification Speeds Design Validation

Leading-edge design companies such as Sun Microsystems Sun Microsystems, Inc. (NASDAQ: JAVA[3]) is an American vendor of computers, computer components, computer software, and information-technology services, founded on 24 February 1982. , AMD (Advanced Micro Devices, Inc., Sunnyvale, CA, www.amd.com) A major manufacturer of semiconductor devices including x86-compatible CPUs, embedded processors, flash memories, programmable logic devices and networking chips. , National Semiconductor, and others have adopted 0-In Check in their IC verification flow. 0-In Check assertion checkers document design interfaces and assumptions in an executable form See executable code. . Simulating with 0-In checkers automatically flags when an assertion is violated and localizes the violation to the appropriate part of the RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  Verilog code to speed debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. .

Check-Lite Facilitates Development and Adoption of White-Box

Verification Flows

0-In Check-Lite makes many features of 0-In Check available at no cost to qualified design groups. 0-In Check-Lite includes support for 0-In's efficient assertion specification format, the most commonly used subset of the CheckerWare Library, documentation, and online training material. 0-In Check-Lite enables customers to apply white box verification during module design, establish their assertion methodology, and integrate assertion based verification methods into their simulation flows.

"Our advanced customers view assertion-based verification as essential to validate their large ICs effectively," said Emil Girczyc, Executive Vice President of Products at 0-In Design Automation. "We are pleased to offer our production-proven technology to enable Verilog design groups so they can more easily learn and deploy assertion-based verification techniques."

About 0-In Check-Lite

0-In Check-Lite enables designers and verification engineers to rapidly and efficiently add assertions to their design and analyze assertion-based verification results. 0-In Check-Lite includes a CheckerWare Library of predefined assertion checkers, support for efficient checker specification via pseudo-comments, and online training to quickly learn assertion-based verification. 0-In Check-Lite is available free of charge to qualified Verilog design groups. To request a copy of 0-In Check-Lite, complete the request form at www.0-In.com

About 0-In

0-In Design Automation, Inc. (pronounced "zero-in") is a privately held electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) company providing functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task,  products that help verify multi-million gate ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  and SOC designs. 0-In was founded in 1996 and is based in San Jose San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, CA, with sales offices in Scituate, MA and Austin, TX plus distribution in Japan through Pacific Design Inc. Leading-edge companies that have adopted 0-In tools and methodologies include AMD, Avaz Networks, Compaq, Fujitsu, HP, Hitachi, Hughes, Lucent, National Semiconductor, Nortel, Sun, Tensilica, Teradiant Networks and others. More information on 0-In is available at http://www.0-in.com

0-In(R)and CheckerWare(TM) are trademarks of 0-In Design Automation, Inc.
COPYRIGHT 2002 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2002, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Jan 28, 2002
Words:439
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