0-In Announces Industry-Leading Verification Technology for Clock-Domain Crossings in SoC Devices.Business Editors/High-Tech Writers SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--Jan. 27, 2003 Today 0-In Design Automation, The Assertion-Based Verification Company, announced new technology to verify clock-domain crossings in complex multiple-clock ASICs and System-on-Chip (SoC) devices. This technology is available in the new 0-In Checklist product, part of 0-In's V2.0 Assertion-Based Verification (ABV ABV Above ABV Alcohol By Volume ABV Abuja, Nigeria (airport code) ABV Assault Breacher Vehicle ABV Accredited Business Valuation specialist ABV Auxiliary Building Ventilation ABV Annual Buy Value ABV Air Bleed Valve ) Suite. 0-In Checklist is the first to combine automatic clock-domain crossing (CDC See Control Data, century date change and Back Orifice. CDC - Control Data Corporation ) analysis and automatic generation of CDC monitors. (See today's release entitled "0-In Announces New Products Based on Breakthrough Formal Verification
In the context of hardware and software systems, formal verification Algorithms" for product details). The 0-In Clock-Domain Crossing Solution 0-In Checklist provides the industry's only complete clock-domain crossing (CDC) methodology, including: -- Automatic detection of signals crossing clock domains -- Static formal verification to find unsafe synchronization -- Automatic generation of synchronization monitors -- Promotion of synchronization monitors for use with simulation and formal verification 0-In Checklist analyzes all clocks within the chip, automatically detecting clock-domain crossings and checking for correct synchronization. This analysis encompasses numerous popular synchronization methods and provides the widest RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; style support of any tool in the industry. 0-In Checklist automatically creates synchronization monitors, including: -- Direct control synchronization -- Direct data synchronization -- Buffer synchronization At the designer's option, these synchronization monitors can be added into simulations or sent to formal engines for further analysis. Background SoC devices often use independent clocks to drive different blocks. For example, the processor bus, peripheral bus, memory ports and external interfaces may all operate on independent clocks. A clock-domain crossing happens when a signal clocked by a transmit clock is sampled by a register clocked by a receive clock that is asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end. to the transmit clock. In this case, the signal may change value very close to the edge of the receive clock, causing the output of the sampling register to become metastable met·a·sta·ble adj. Of, relating to, or being an unstable and transient but relatively long-lived state of a chemical or physical system, as of a supersaturated solution or an excited atom. before it settles randomly to either the old value or the new value. If the CDC involves a multiple-bit signal, then each bit of the sampling register may independently settle to either the old or new value. To avoid unpredictable behavior related to metastability met·a·sta·ble adj. Of, relating to, or being an unstable and transient but relatively long-lived state of a chemical or physical system, as of a supersaturated solution or an excited atom. , SoC designs must properly synchronize all control signals that cross clock domains, and they must follow proper handshaking Signals transmitted back and forth over a communications network that establish a valid connection between two stations. 1. handshaking - Predetermined hardware or software activity designed to establish or maintain two machines or programs in synchronisation. protocol to ensure that multiple-bit signals that cross clock domains are used only when all the bits are consistent. 0-In Checklist automatically detects each clock-domain crossing, analyzes the synchronization method, and produces a monitor that checks for proper synchronization in simulation. The tool also produces a monitor that allows 0-In's formal verification tools to exhaustively verify proper synchronization. Formal verification of proper synchronization across clock domains is a unique capability of 0-In's ABV tool suite. About 0-In 0-In Design Automation, Inc. (pronounced "zero-in") develops and supports functional verification products that help verify multi-million gate application-specific integrated circuit (hardware) Application-Specific Integrated Circuit - (ASIC) An integrated circuit designed to perform a particular function by defining the interconnection of a set of basic circuit building blocks drawn from a library provided by the circuit manufacturer. (ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. ) and system-on-chip (SoC) designs. The company delivers a comprehensive assertion-based verification (ABV) solution that provides value throughout the design and verification cycle -- from the block level to the chip and system level. Twelve of the 15 largest electronics companies have adopted 0-In tools and methodologies in their integrated circuit (IC) design verification flows. 0-In was founded in 1996 and is based in San Jose, Calif. For more information, see http://www.0-in.com. Note to Editors: 0-In(R) and CheckerWare(R) are registered trademarks of 0-In Design Automation, Inc. |
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