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$89 EDA Tool Facilitates Addition of ISP Flash, Logic and Supervisory Functions to MCU-based Designs.


FREMONT, Calif.--(BUSINESS WIRE)--Jan. 19, 1999--WSI today introduced a new suite of Windows(R)-based EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  tools to support the company's in-system-programmable (ISP (1) See in-system programmable.

(2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines.
) flash-PSD813F MCU (1) (MicroController Unit) A computer on a single chip. See microcontroller.

(2) (Multipoint Control Unit) A device that is used to moderate a videoconference of three or more end points (users at computers or groups of users
 support ICs, as well as the company's six other PSD (tool) PSD - Portable Scheme Debugger.  families. WSI's PSDs provide MCU-based systems with a wide range of low-cost, low-power, single-chip solutions that integrate programmable logic See PLD. , ISP flash, EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting.  or EPROM EPROM
 in full erasable programmable read-only memory

Form of computer memory that does not lose its content when the power supply is cut off and that can be erased and reused.
 memory, SRAM See static RAM.

SRAM - static random-access memory
, extra I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
, and programmable functions.

PSDsoft 5.0 radically simplifies the addition of external programmable logic and flash, EEPROM or EPROM memories to MCU-based systems that have outgrown the capabilities of their single-chip microcontrollers. The tool suite supports HDL-based logic design and simulation of the PSD's on-chip CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. ; MCU interface configuration; I/O control; memory mapping Memory mapping is a process whereby some item of digital hardware is connected to a processor's address bus and data bus in such a way that it can be accessed (for reading and/or writing) exactly as if it were a memory cell. ; and the configuration of programmable functions integrated in various PSD devices. In addition, the new EDA tool automatically generates C-routines for the implementation of MCU-controlled in-system-programmability.

David Raun, WSI's vice president of marketing explained, "In spite of the fact that over half of all microcontroller-based designs include some external logic, memory or other functions, there have been no tools to support the complex process of adding external devices to these systems.

"Adding any external device to an MCU-based design is tough. It requires the design and debugging of an interface to connect the MCU to the external device. It may require external logic for decoding. And it may require the design of an interface between the MCU address/data bus and PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user.  flip-flops. If there's going to be any ISP, the C-routine with the programming algorithms will also have to be modified, input and debugged. This is a lot of work that can substantially extend the design cycle.

"With PSDsoft, there is almost no work at all. The software handles everything from MCU interface configuration to automatically generating the C-routines that perform ISP functions. Any designer who needs to add external logic or memory to an MCU-based design should try this tool and the chips it supports before trying any other alternative," Raun concluded.

Menu-driven MCU-Interface Configuration -- Adding any external device to a microcontroller-based design requires the design of an interface to the MCU. If external memory is being added, peripheral logic and latches will be required for the interface. If an external CPLD is being added, a substantial portion of its internal logic resources will be used to connect the PLD flip-flops to the MCU address/data bus.

Using PSDsoft, designers can configure the MCU-interface built into all PSD devices in just a few minutes. Templates included with PSDsoft provide bus interface configurations for the most popular microcontrollers (68HC11, 8031, 80196, 3150 etc.). The device configuration process takes less than five minutes. Since the PSD itself contains all the necessary logic and latches, no additional chips are required.

Device Configuration -- Dialog boxes and pop-up menus lead the designer through the MCU interface configuration and provide a comprehensive set of configuration options including bus-width, muxed or non-muxed operation, and MCU bus control settings that meet the interface requirements of virtually all popular 8- and 16-bit MCU buses.

These include menu choices for each bus interface which are selected by clicking on the appropriate button. Six bus interface selections are available as follows: 1) /WR,/RD/BHA; 2) R/W R/W Read/Write
R/W Right-Of-Way
R/W Rotary Wing (aviation)
R/W Random Width
R/W Reimbursable Work
R/W Raw Weight
,E,/BHE; 3) /WRL,/RD,/WRH; 4) R/W,/LDS,/UDS; 5) R/W,/DS, SIZ SIZ Informatikzentrum der Sparkassenorganisation (Bonn, Germany)
SIZ Seasonal Ice Zone
SIZ Special Industrial Zone (Balochistan, Pakistan)
SIZ Sediment Impact Zone
SIZ Security Identification Zone
0; 6) R/W,/DS,/BHE,/BLE. The menu also permits the selection of address latch enable high or low. A clock-count/power down feature and EPROM code protection can be selected by clicking on an appropriate button. The software guides the designer through the configuration process. PSDsoft presents only those options that are specific to the device selected for the project.

Menu-driven Configuration of Programmable Functions -- PSDsoft provides push-button (electronics) push-button - A roughly fingertip-sized plastic cover attached to a spring-loaded, normally-open switch, which, when pressed, closes the switch. Typical examples are the keys on a computer or calculator keyboard and mouse buttons.  configuration of any programmable functions that are available on the PSD device that has been selected for the design. These can include: programmable timer/counters, interrupt controllers, watchdog timers, brown out detection, reset pulse width pulse width Pulse duration Cardiac pacing The duration of a pacing pulse in msecs , and power-on reset A power-on reset (PoR) generator is a microcontroller or microprocessor peripheral that generates a reset signal when power is applied to the device. It ensures that the device starts operating in a known state.  functions. These functions are programmed by clicking on the appropriate radio buttons A series of on-screen buttons that allow only one selection to be made from the group. If a button is currently selected, it will de-select when any other button is selected. Radio buttons come from the early days of radio, which had five or six preset station buttons in a row.  in the user interface and take just a few minutes to configure.

Logic Design Entry -- PSDsoft uses PSDabel, WSI's own version of Data I/O's ABEL Abel, son of Adam and Eve, in the Bible
Abel, in the Bible, son of Adam and Eve, a shepherd, killed by his older brother, Cain; in the Gospel of St. Matthew, mentioned as the first martyr.
 6.2, for PLD design and logic optimization Logic optimization a part of logic synthesis, is the process of finding an equivalent representation of the specificied logic circuit under one or more specified constraint. Generally the circuit is constrained to minimum chip area meeting a prespecified delay. . Using PSDabel, logic designs may be entered using boolean equations, truth tables, state diagrams or any combination of these. A decompiler A program that converts machine language back into a high-level source language. The resulting code may be very difficult to maintain as variables and routines are named generically: A0001, A0002, etc. See disassembler.  built into the software allows previous PSD designs to be uploaded, decompiled and modified. Often, AHDL AHDL - Analog Hardware Design Language  designs that have been tested and debugged in discrete components or EPLDs may be copied into PSDsoft and migrated to the programmable logic on the PSD device with minimal modification. A device- and pin-independent functional design verification can be performed using PSDabel.

Logic Design Optimization -- The PSDabel optimizer performs logic reduction by eliminating redundancies and maximizing resource utilization. Registers specified as JK, SR, T or D flip flops are synthesized to either D or T flip flops so that the number of product terms used is minimized. The logic reduction algorithm automatically optimizes each output for both polarities and selects the polarity that uses the smallest number of product terms. It also minimizes all possible equations with multiple outputs to a single product term.

The following fitting algorithms are available: 1) keep the current user-defined pin assignments; 2) keep the pin assignments from the previous fitting; 3) try to maintain as many existing pin assignments as possible; or 3) make any pin assignment necessary to fit the design.

PSDsoft automatically generates reports showing macrocell resource utilization and the actual equations. Based on this information, the designer may select a larger or smaller PSD, or modify the logic design. Once fitting is complete, PSDsoft automatically generates a pin-out diagram that can be used for document control and as the basis for the PSD portion of the board level design.

Address Translation -- Once the device configuration, logic design and MCU firmware are complete, the designer can merge them together and map them into the target PSD device using the "Address Translation" pull-down menu. A dialog box displays the logic equations for the memory address selections defined in the logic design, shows the start and stop addresses for the memory blocks, and lists the name of the firmware file for that address range. By clicking the right mouse button on the file name box, the user can browse to locate the appropriate file. PSDsoft ensures there is no conflict between the addresses assigned to the logic and microcontroller firmware.

Address mapping may be accomplished using a "direct" or "relative" mode. With direct mapping, the program code is mapped into the memory location that has been specified in the program code itself. Relative mapping allows the designer to manually specify file address start/stop values. The code is mapped at the file address at the beginning of the memory block.

ISP Programming Algorithms Automatically Generated -- In order to effect MCU-controlled in-system-programming of PSD flash or EEPROM memory arrays firmware must be executed that includes the programming algorithms. Typically the vendors of ISP memories provide generic algorithms in the data book. Designers must implement the algorithms, usually writing their own C-programs. This is a tedious and error prone process that further extends the design cycle.

PSDsoft eliminates this laborious process. The programming algorithms are embedded in PSDsoft. C-code functions are automatically generated which are ready to merge with the designer's application code. These C-code functions include flash erase/write algorithms, EEPROM programming algorithms, I/O control and definition, memory management, power management and others. The C-code can then be cross compiled and linked with any other MCU firmware for execution. This is a hands-off process that takes only a couple of seconds. It saves much design time and prevents any errors that might occur during a manual procedure.

PSDsoft Simplifies Design Cycle -- The only other option available to embedded system designers who require more program store, programmable logic or I/O in their designs is to use an off-MCU memory, discrete glue logic and/or EPLDs and other external devices. Since the addressing schemes of various MCUs are different, the designer must design a bus interface and address decoding scheme for the target microcontroller from scratch. In addition, the designer must manually verify that there is no overlap between the addresses for the logic and MCU program code. This process can add several days to the design cycle. PSDsoft verifies the addresses automatically and quickly.

Intel Hex or Motorola-S Records Supported -- PSDsoft generates the device map in Intel Hex. Either Intel Hex or Motorola S-Record format files can be imported easily into the PSD's memory regions by clicking on the appropriate button.

Programmers -- PSDsoft is tailored for use with WSI's FlashLink(TM), MagicPro(R) III, and PSDpro(TM) programmers, and provides direct access to the PSD object files via on-screen on·screen or on-screen  
adj. & adv.
1. As shown on a movie, television, or display screen.

2. Within public view; in public.
 function menus. Thus, code, variables, coefficients or other data can be individually modified. The non-volatile memory, logic and device configuration can be programmed individually or together. All three programmers allow code to be uploaded from previously programmed PSD devices, simplifying the migration of logic designs between devices.

Runs Under Microsoft(R) Windows 95, Windows 98 or Windows NT -- The PSDsoft suite of logic design, device configuration, fitting, simulation, programming, and C-code generating tools is seamlessly integrated under a design management framework. Comprehensive reports on pin assignments and device utilization are generated. PSDsoft operates under Microsoft(R) Windows(R) 95, 98 or NT. It requires a 66 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  or faster Intel 486 PC with 8 megabytes of memory and 25 megabytes of hard disk space.

Pricing and Availability -- PSDsoft 5.0 is priced at $89 and is available immediately.

WSI's World Wide Web site is www.wsipsd.com.

WSI See wafer scale integration.  is the leading supplier of highly integrated solutions for high-speed embedded control designs. Its PSD families of single-chip, field-programmable microcontroller peripherals off-load microcontroller functions so that MCUs can operate faster and can do more. The power-conserving features of PSD devices can extend system battery life by several hours. The company's family of high performance non-volatile memory products offers densities of 16-kbit to 1 megabit with access times as low as 25 ns and 3.3 volt devices with access times as low as 70 ns. WSI is located in Fremont, Calif.

Note to Editors: Windows(R) and Windows 95(R) are registered trademarks of Microsoft Corp. Micro-Cell is a trademark of WSI.
COPYRIGHT 1999 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1999, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Date:Jan 19, 1999
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